EFM32TG110 Datasheet, PDF (45/65 Pages) Silicon Laboratories – Output state retention and wake-up from Shutoff Mode

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4 Pinout and Package
Note
Please refer to the application note "AN0002 EFM32 Hardware Design Considerations" for
guidelines on designing Printed Circuit Boards (PCB's) for the EFM32TG110.
4.1 Pinout
The EFM32TG110 pinout is shown in Figure 4.1 (p. 45) and Table 4.1 (p. 45). Alternate locations
are denoted by "#" followed by the location number (Multiple locations on the same pin are split with "/").
Alternate locations can be configured in the LOCATION bitfield in the *_ROUTE register in the module
in question.
Figure 4.1. EFM32TG110 Pinout (top view, not to scale)
Table 4.1. Device Pinout
QFN24 Pin#
and Name
Pin Alternate Functionality / Description
Pin Name
Analog
Timers
Communication
0
VSS
Ground.
1
PA0
2
IOVDD_0
Digital IO power supply 0.
TIM0_CC0 #0/1/4
LEU0_RX #4
I2C0_SDA #0
Other
PRS_CH0 #0
GPIO_EM4WU0
2015-03-06 - EFM32TG110FXX - d0013_Rev1.40
45
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