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EFM32G800 Datasheet, PDF (4/22 Pages) Silicon Laboratories – Memory Protection Unit
3 Pinout and Package
...the world's most energy friendly microcontrollers
Note
Please refer to the application note "AN0002 EFM32 Hardware Design Considerations" for
guidelines on designing Printed Circuit Boards (PCB's) for the EFM32G800.
3.1 Padout
The EFM32G800 padout is shown in Figure 3.1 (p. 4) and Table 3.1 (p. 5). Alternate locations
are denoted by "#" followed by the location number (Multiple locations on the same pad are split with "/").
Alternate locations can be configured in the LOCATION bitfield in the *_ROUTE register in the module
in question.
Figure 3.1. EFM32G800 Padout (top view, not to scale)
(X,Y): (- 1690, 1625)
PA0 1
PA1 2
PA2 3
PA3 4
PA4 5
PA5 6
PA6 7
iovdd_0 8
iovss_0 9
PD14 10
PD15 11
PB0 12
PB1 13
PB2 14
NC 15
PB3 16
PB4 17
PB5 18
PB6 19
iovss_1 20
iovdd_1 21
NC 22
PC0 23
PC1 24
PC2 25
PC3 26
PC4 27
PC5 28
PB7 29
PB8 30
(X,Y): (- 1690, - 1625)
(X,Y): (0, 0)
(X,Y): (1690, 1625)
89 PC15
88 PC14
87 PC13
86 PC12
85 PC11
84 PC10
83 PC9
82 PC8
81 PE7
80 PE6
79 PE5
78 PE4
77 PE3
76 PE2
75 PE1
74 PE0
73 NC
72 iovss_4
71 dec_1
70 dec_0
69 iovdd_4
68 vdd_dreg
67 vss_dreg
66 PC7
65 PC6
64 PD8
63 PD7
62 PD6
61 PD5
(X,Y): (1690, - 1625)
The pad coordinates represent the center of the pad opening relative to the die center.
2015-05-22 - EFM32G800FXX - d0322_Rev1.90
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