SI53159-EVB Datasheet, PDF (3/6 Pages) Silicon Laboratories – Power consumption test

Si53159-EVB
1.1. Generating DIFF Outputs from the Si53159
Upon power-on of the device if the differential input is applied and input pins are left floating, by default all DIFF
outputs DIFF[0:8] are ON. The input pin headers have clear indication of jumper settings for setting logic low (0)
and high (1) as shown in the figure below, the jumper placed on the middle and left pin will set input OE0 to low;
and jumper placed on the middle and right pin will set input OE0 to high.
The output enable pins can be changed on the fly to observe outputs stopped cleanly. Input functionality is
explained in detail below.
1.1.1. OE [0:8] Inputs
The output enable pins can change on the fly when the device is on. Deasserting (valid low) results in
corresponding DIFF output to be stopped after their next transition with final state low/low. Asserting (valid high)
results in corresponding output that was stopped are to resume normal operation in a glitch-free manner.
Each of the hardware OE [0:8] pins are mapped via I²C to control bit in Control register. The hardware pin and the
Register Control Bit both need to be high to enable the output. Both of these form an “AND” function to disable or
enable the DIFF output. The DIFF outputs and their corresponding I²C control bits and hardware pins are listed in
Table 2.
Table 2. Output Enable Control
I²C Control Bit
Byte1 [bit 4]
Byte1 [bit 2]
Byte2 [bit 1]
Byte2 [bit 0]
Byte1 [bit 7]
Byte1 [bit 6]
Byte2 [bit 5]
Byte2 [bit 4]
Byte2 [bit 3]
Output
DIFF0
DIFF1
DIFF2
DIFF3
DIFF4
DIFF5
DIFF6
DIFF7
DIFF8
Hardware Control Input
OE0
OE1
OE2
OE3
OE4/5
OE4/5
OE6/8
OE6/8
OE6/8
Rev. 0.1
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