EFM32G280 Datasheet, PDF (3/72 Pages) Silicon Laboratories – Wake-up Interrupt Controller

2 System Summary
...the world's most energy friendly microcontrollers
2.1 System Introduction
The EFM32 MCUs are the world’s most energy friendly microcontrollers. With a unique combination of
the powerful 32-bit ARM Cortex-M3, innovative low energy techniques, short wake-up time from energy
saving modes, and a wide selection of peripherals, the EFM32G microcontroller is well suited for any
battery operated application as well as other systems requiring high performance and low-energy con-
sumption. This section gives a short introduction to each of the modules in general terms and also shows
a summary of the configuration for the EFM32G280 devices. For a complete feature set and in-depth
information on the modules, the reader is referred to the EFM32G Reference Manual.
A block diagram of the EFM32G280 is shown in Figure 2.1 (p. 3) .
Figure 2.1. Block Diagram
G280F32/ 64/ 128
Core and Memory
Clock Managem ent
ARM Cortex™- M3 processor
Flash
Memor y
[KB]
32/ 64/ 128
RAM
Memor y
[KB]
8/ 16/ 16
Deb u g
Interface
Memory
Protection
Unit
DMA
Controller
High Frequency
Crystal
Oscillator
High Frequency
RC
Oscillator
Aux High Freq
RC
Osci l l at o r
Lo w Frequency
RC
Oscillator
Lo w Frequency
Crystal
Oscillator
Watch d o g
Oscillator
Energy Managem ent
Voltage
Regulator
Voltage
Comp arator
Power -o n
Reset
Brown-out
Detector
Serial Interfaces
USA RT
3x
Lo w
Energy
UART™
2x
UART
I²C
32-bit bus
Peripheral Reflex System
I/O Ports
Timers and Triggers
Ex ternal
Bus
Interface
General
Purp ose
I/ O
86 pins
Timer/
Counter
3x
Perip h eral
Reflex
Sys tem
Low Energy Real Time
Timer™ Counter
Ex ternal
Inter ru pts
Pin
Reset
Pulse
Counter
3x
Watch d o g
Timer
Analog Interfaces
Security
ADC
DAC
AES
2x
Analog
Comp arator
2x
2.1.1 ARM Cortex-M3 Core
The ARM Cortex-M3 includes a 32-bit RISC processor which can achieve as much as 1.25 Dhrystone
MIPS/MHz. A Memory Protection Unit with support for up to 8 memory segments is included, as well
as a Wake-up Interrupt Controller handling interrupts triggered while the CPU is asleep. The EFM32
implementation of the Cortex-M3 is described in detail in EFM32G Cortex-M3 Reference Manual.
2.1.2 Debug Interface (DBG)
This device includes hardware debug support through a 2-pin serial-wire debug interface . In addition
there is also a 1-wire Serial Wire Viewer pin which can be used to output profiling information, data trace
and software-generated messages.
2.1.3 Memory System Controller (MSC)
The Memory System Controller (MSC) is the program memory unit of the EFM32G microcontroller. The
flash memory is readable and writable from both the Cortex-M3 and DMA. The flash memory is divided
2015-05-22 - EFM32G280FXX - d0006_Rev1.90
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