SI8441AB-D-IS Datasheet, PDF (28/38 Pages) Silicon Laboratories – LOW-POWER QUAD-CHANNEL DIGITAL ISOLATOR

Si8440/41/42/45
Table 15. Ordering Guide for Valid OPNs¹ (Continued)
Ordering Part
Number (OPN)
Number of Number of Maximum
Inputs VDD1 Inputs VDD2 Data Rate
Side
Side
(Mbps)
Isolation
Rating
Temp Range Package Type
Revision C Devices²
Si8440AA-C-IS1
4
Si8440BA-C-IS1
4
0
1
0
150
Si8441AA-C-IS1
3
Si8441BA-C-IS1
3
Si8442AA-C-IS1
2
1
1
1
150
1 kVrms –40 to 125 °C NB SOIC-16¹
2
1
Si8442BA-C-IS1
2
Si8445BA-C-IS1
4
2
150
0
150
Si8440AB-C-IS
4
0
1
Si8440BB-C-IS
4
Si8441AB-C-IS
3
Si8441BB-C-IS
3
Si8442AB-C-IS
2
0
150
1
1
1
150
2.5 kVrms –40 to 125 °C WB SOIC-16¹
2
1
Si8442BB-C-IS
2
2
150
Si8445BB-C-IS
4
Si8440AB-C-IS1
4
0
150
0
1
Si8440BB-C-IS1
4
Si8441AB-C-IS1
3
Si8441BB-C-IS1
3
0
150
1
1
1
150
2.5 kVrms –40 to 125 °C NB SOIC-16¹
Si8442AB-C-IS1
2
Si8442BB-C-IS1
2
2
1
2
150
Si8445BB-C-IS1
4
0
150
Notes:
1. All packages are RoHS-compliant with peak reflow temperatures of 260 °C according to the JEDEC industry standard
classifications and peak solder temperatures.
Moisture sensitivity level is MSL2A for wide-body SOIC-16 packages.
Moisture sensitivity level is MSL2A for narrow-body SOIC-16 packages.
2. Revision C devices are supported for existing designs, but Revision D is recommended for all new designs.
3. AEC-Q100 qualified.
28
Rev. 1.5