SI8441AB-D-IS Datasheet, PDF (22/38 Pages) Silicon Laboratories – LOW-POWER QUAD-CHANNEL DIGITAL ISOLATOR

Si8440/41/42/45
2.4. Layout Recommendations
To ensure safety in the end user application, high voltage circuits (i.e., circuits with >30 V_AC) must be physically
separated from the safety extra-low voltage circuits (SELV is a circuit with <30 V_AC) by a certain distance
(creepage/clearance). If a component, such as a digital isolator, straddles this isolation barrier, it must meet those
creepage/clearance requirements and also provide a sufficiently large high-voltage breakdown protection rating
(commonly referred to as working voltage protection). Table 6 on page 15 and Table 7 on page 15 detail the
working voltage and creepage/clearance capabilities of the Si84xx. These tables also detail the component
standards (UL1577, IEC60747, CSA 5A), which are readily accepted by certification bodies to provide proof for
end-system specifications requirements. Refer to the end-system specification (61010-1, 60950-1, etc.)
requirements before starting any design that uses a digital isolator.
The following sections detail the recommended bypass and decoupling components necessary to ensure robust
overall performance and reliability for systems using the Si84xx digital isolators.
2.4.1. Supply Bypass
Digital integrated circuit components typically require 0.1 µF (100 nF) bypass capacitors when used in electrically
quiet environments. However, digital isolators are commonly used in hazardous environments with excessively
noisy power supplies. To counteract these harsh conditions, it is recommended that an additional 1 µF bypass
capacitor be added between VDD and GND on both sides of the package. The capacitors should be placed as
close as possible to the package to minimize stray inductance. If the system is excessively noisy, it is
recommended that the designer add 50 to 100  resistors in series with the VDD supply voltage source and 50 to
300  resistors in series with the digital inputs/outputs (see Figure 8). For more details, see "3. Errata and Design
Migration Guidelines" on page 25.
All components upstream or downstream of the isolator should be properly decoupled as well. If these components
are not properly decoupled, their supply noise can couple to the isolator inputs and outputs, potentially causing
damage if spikes exceed the maximum ratings of the isolator (6 V). In this case, the 50 to 300  resistors protect
the isolator's inputs/outputs (note that permanent device damage may occur if the absolute maximum ratings are
exceeded). Functional operation should be restricted to the conditions specified in Table 1, “Recommended
Operating Conditions,” on page 4.
2.4.2. Pin Connections
No connect pins are not internally connected. They can be left floating, tied to V_DD, or tied to GND.
2.4.3. Output Pin Termination
The nominal output impedance of an isolator driver channel is approximately 85 , ±40%, which is a combination
of the value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving
loads where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces. The series termination resistor values should be scaled appropriately while keeping in
mind the recommendations described in “2.4.1. Supply Bypass” above.
V Source 1
R1 (50 – 100 )
C1
0.1 F
C2
1 F
50 – 300 
Input/Output
50 – 300 
VDD1
A1
Ax
GND1
VDD2
B1
Bx
GND2
50 – 300 
Input/Output
50 – 300 
V Source 2
R2 (50 – 100 )
C4
0.1 F
C3
1 F
Figure 8. Recommended Bypass Components for the Si84xx Digital Isolator Family
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Rev. 1.5