EM34X-VREVK Datasheet, PDF (219/237 Pages) Silicon Laboratories – High-Performance, Integrated RF4CE System-on-Chip

EM341
Table 17.1. EM341 Pin Descriptions (Continued)
Pin #
38
Signal
PC1
Direction
I/O Digital I/O
Description
ADC3
SWO
(see also Pin 33)
Analog
O
ADC Input 3
Enable analog function with GPIO_PCCFGL[7:4]
Serial Wire Output asynchronous trace output to debugger
Select asynchronous trace interface in ARM core
Enable trace interface in ARM core
Select alternate output function with GPIO_PCCFGL[7:4]
TRACEDATA0
O
Synchronous CPU trace data bit 0
Select 1-, 2- or 4-wire synchronous trace interface in ARM core
Enable trace interface in ARM core
Select alternate output function with GPIO_PCCFGL[7:4]
39
VDD_MEM
Power 1.8 V supply (flash, RAM)
40
PC0
I/O Digital I/O
High Either enable with GPIO_DBGCFG[5],
current or enable Serial Wire mode (see JTMS description, Pin 35) and disable
TRACEDATA1
JRST
I
JTAG reset input from debugger
Selected when in JTAG mode (default mode, see JTMS description) and
TRACEDATA1 is disabled
Internal pull-up is enabled
IRQD
TRACEDATA1
I
Default external interrupt source D.
IRQC and IRQD external interrupts can be mapped to any digital I/O pin
using the GPIO_IRQSEL and GPIO_IRQDSEL registers.
O
Synchronous CPU trace data bit 1
Select 2- or 4-wire synchronous trace interface in ARM core
Enable trace interface in ARM core
Select alternate output function with GPIO_PCCFGL[3:0]
41
PB7
I/O Digital I/O
High
current
ADC2
Analog ADC Input 2
Enable analog function with GPIO_PBCFGH[15:12]
IRQC
I
Default external interrupt source C.
IRQC and IRQD external interrupts can be mapped to any digital I/O pin
using the GPIO_IRQSEL and GPIO_IRQDSEL registers.
TIM1C2
TIM1C2
O
Timer 1 channel 2 output
Enable timer output in TIM1_CCER
Select alternate output function with GPIO_PBCFGH[15:12]
I
Timer 1 channel 2 input
Cannot be remapped
Rev 1.0