SI1000-E-GM2 Datasheet, PDF (20/382 Pages) Silicon Laboratories – MCU with Integrated 240–960 MHz EZRadioPRO® Transceiver

Si1000/1/2/3/4/5
C2CK/RST
VDD/DC+
GND/DC-
VBAT
GND
XTAL3
XTAL4
Power On
Reset/PMU
Wake
Reset
Debug /
Programming
Hardware
CIP-51 8051
Controller Core
64k Byte ISP Flash
Program Memory
256 Byte SRAM
4096 Byte XRAM
C2D
Power Net
Analog
Power
VREG
Digital
Power
CRC
Engine
SYSCLK
DC/DC
Converter
Precision
24.5 MHz
Oscillator
Low Power
20 MHz
Oscillator
XTAL1
XTAL2
External
Oscillator
Circuit
SmaRTClock
Oscillator
System Clock
Configuration
SFR
Bus
Analog Peripherals
6-bit
IREF
IREF0
Internal External
VREF VREF
10-bit
300ksps
ADC
A
M
U
X
VDD
VREF
Temp
Sensor
GND
CP0, CP0A ₊
CP1, CP1A + ^-
-
Comparators
Digital Peripherals
Transceiver Control Interface
UART
Timers 0,
1, 2, 3
PCA/
WDT
SMBus
SPI 0
Priority
Crossbar
Decoder
RF XCVR
(240-960 MHz)
PA
AGC
LNA
Mixer
PGA
ADC
Digital
Modem
Delta
Sigma
Modulator
Digital
Logic
OSC
TX
RXp
RXn
XIN
XOUT
Port I/O ¹⁹
Config
ANALOG &
DIGITAL I/O
Figure 1.5. Si1004 Block Diagram
C2CK/RST
VDD/DC+
GND/DC-
VBAT
GND
XTAL3
XTAL4
Power On
Reset/PMU
Wake
Reset
Debug /
Programming
Hardware
CIP-51 8051
Controller Core
32k Byte ISP Flash
Program Memory
256 Byte SRAM
4096 Byte XRAM
C2D
Power Net
Analog
Power
VREG
Digital
Power
CRC
Engine
SYSCLK
DC/DC
Converter
Precision
24.5 MHz
Oscillator
Low Power
20 MHz
Oscillator
XTAL1
XTAL2
External
Oscillator
Circuit
SmaRTClock
Oscillator
System Clock
Configuration
SFR
Bus
Analog Peripherals
6-bit
IREF
IREF0
Internal External
VREF VREF
10-bit
300ksps
ADC
A
M
U
X
VDD
VREF
Temp
Sensor
GND
CP0, CP0A ₊
CP1, CP1A + ^-
-
Comparators
Digital Peripherals
Transceiver Control Interface
UART
Timers 0,
1, 2, 3
PCA/
WDT
SMBus
SPI 0
Priority
Crossbar
Decoder
RF XCVR
(240-960 MHz)
PA
AGC
LNA
Mixer
PGA
ADC
Digital
Modem
Delta
Sigma
Modulator
Digital
Logic
OSC
TX
RXp
RXn
XIN
XOUT
Port I/O ¹⁹
Config
ANALOG &
DIGITAL I/O
Figure 1.6. Si1005 Block Diagram
20
Rev. 1.3