ISL6730 Datasheet, PDF (16/19 Pages) Intersil Corporation – Reduce component size requirements

ISL6730A, ISL6730B, ISL6730C, ISL6730D
80
10.5kHz
60
40
20
0
-20
180
10.5kHz
135
90
60
45
45
0
10
100
1x10³
1x10³
1x10³
FREQUENCY (Hz)
FIGURE 17. BODE PLOT OF THE ACTUAL CURRENT LOOP GAIN
INPUT VOLTAGE SETTING
First, set the BO resistor divider gain, K_BO according to
Equations 1 and 2.
Assuming the converter starts at V_LINE = 80V_RMS, then the BO
resistor divider gain, K_BO should be:
K_BO
=
-------⁰---^.--⁵---^V---------
80V – 2V
=
0.00641
(EQ. 57)
In this design, two 3.3MΩ resistors in series are used for R_IN2.
So, R_IN1 is calculated:
R_IN1
=
-----⁰---^.--⁰----⁰---⁶---⁴----¹------
1 – 0.00641
⋅
( 6.6
M
Ω
)
=
42.6 k Ω
(EQ. 58)
Using resistor from the standard value, R_IN1 = 43kΩ, the actual
K_BO is calculated:
K_BO
=
----------^R-----^I--^N----¹-----------
R_IN1 + R_IN2
=
0.00647
(EQ. 59)
NEGATIVE INPUT CAPACITOR GENERATION
The ISL6730A, ISL6730B, ISL6730C, ISL6730D generates an
equivalent negative capacitance at the input to cancel the input
filter capacitance. Thus, more input capacitors can be used
without reducing the power factor.
The input equivalent negative capacitance is a function of the
current sensing gain, BO resistor divider gain and the
compensation components.
C_NEG=
⎛
⎝⎜ ^{K B O}
⋅
0.8
–
V^----V-_O^---m-_U^----_T^--_{⎠⎟⎞}
------^R----^S----^E----^N-------
R_CSA_iDC
(C_i
c
+
C_ip)
(EQ. 60)
C_NEG=
⎛
⎝
0.00647
⋅
0.8
–
3^-1---9^-.-5-0^{--⎠⎞}
0^----.^--0^-3--6^-.--18---6--⋅^--k-1^---.^--9^--
( 18 n
F
+
1.2
n
F)
=
0.62 μ F
(EQ. 61)
This equivalent negative capacitor cancels the input filter
capacitor required for EMI filtering. Therefore, the displacement
power factor significantly improves.
For example, C_F2 = 0.68µF, C_F1 = 0.94µF, using the low cost EMI
filter shown in Figure 13. When V_LINE = 230VAC, f_LINE = 50Hz,
P_O = 60W.
Assuming 95% efficiency under the above test condition, the
resistive component, which is in phase to voltage:
I_a= _V-----_L---_I--_N----^P_E----^o-_â‹---₀---_.--₉---₅-- = 0.275A
(EQ. 62)
The reactive current through the input capacitors:
I_c= V_LINE • (2π ⋅ f_LINE) • (C_F1 + C_F2) = 0.117A
(EQ. 63)
Thus, the displacement power factor is:
PF_DIS=
----------------^I--^a-----------------
(I_a)² + (I_c)²
=
0.92
(EQ. 64)
The reactive current generated by the equivalent negative
capacitor is:
I_cneg= V_LINE • (2π ⋅ f_LINE) • (C_NEG) = 0.045A
(EQ. 65)
With the equivalent negative capacitor, the total reactive current
reduces to:
I_c – I_cneg = 0.072A
(EQ. 66)
The displacement power factor increases to:
PF_DIS=
--------------------------^I--^a---------------------------
(I_a)² + (I_c – I_cneg)²
=
0.967
(EQ. 67)
VOLTAGE LOOP COMPENSATION
The average diode forward current can be approximated by:
I_D(ave)=
----^P----ⁱ--ⁿ-----
V_OUT
(EQ. 68)
Assuming the input current traces the input voltage perfectly. The
input power is in proportion to (V_COMP - 1V).
I_D(ave)=
R^-----_C^----_S^---R--⋅^---S0^----.^E-5^---N--⋅^---R^-----_I^--_S^-
•
-------¹--------
V_OUT
•
⎛
⎜
⎜
⎝
-₍--₍--₂--------₂----₎--⁰--_⁄-^.-_π-²---₎⁵--₂-----_â‹---_K----_B----_O--_{⎠⎟⎟⎞}
• Δ_COMP
(EQ. 69)
Where Δ_COMP is the V_COMP - 1V. 1V is the offset voltage.
R_IS is the internal current scaling resistor. R_IS = 14.2kΩ.
I_D(ave)=
0.598
A_---
V
• Δ_COMP
(EQ. 70)
16
FN8258.1
August 8, 2013