ISL6730 Datasheet, PDF (15/19 Pages) Intersil Corporation – Reduce component size requirements

ISL6730A, ISL6730B, ISL6730C, ISL6730D
V_I
L
Q₁
C_F1
R_CS
R_SEN
ISEN
ICOMP
R_ic
C_ic
C_ip
Gmi
V_OUT
C_OUT
CURRENT
MIRROR
2:1
ICS
I_REF
R_IS
FIGURE 15. INDUCTOR CURRENT SENSING SCHEME
FROM DUTY TO
80
INDUCTOR CURRENT
40
20 _COMPENSATION
GAIN
0
-20
F_Z
F_P
-40
-60
CURRENT GAIN
-80 ^{MODULATOR GAIN}
OPEN LOOP
GAIN
-100
100
1k
10k
FREQUENCY (Hz)
100k
FIGURE 16. ASYMPTOTIC BODE PLOT OF CURRENT LOOP GAIN
F_Z=
-----------------¹------------------
2π
•
R_i
c
•
C
ic
(EQ. 46)
F_P= -₂---_π-----_•----_R-----_i--_c----_•-¹---_C-C---------_ii---pp---------+_{•---------CC}---------_i-i--_c-_c--
(EQ. 47)
Use the following guidelines for locating the poles and zeros of
the compensation network.
The cross over frequency of the current loop should be set
between 2kHz to 100kHz. At cross over frequency, the transfer
function from duty cycle to inductor current is well approximated
by Equation 48:
G_id(s)= _L---^V-_B----^OS----_TU----^T-_â‹---_s-
(EQ. 48)
It is recommended to set the cross over frequency from 1/10 to
1/6 of the switching frequency with phase margin of 60°. A high
frequency pole is set at 1/2 of the switching frequency for ripple
filtering. In this example, we set the cross over, F_C at 1/6 of the
switching frequency.
F_Z=
-------------------------^F----^C---------------------------
⎛
tan ⎜
⎝
atan
⎛
⎜
⎝
F_{-F---C-P--⎠⎟⎞}
+
⎞
Φ_{M⎠⎟}
(EQ. 49)
Where F_C = F_S/6 = 10.3kHz, Φ_M is the phase margin, which is
60°. F_P = F_S/2 = 31kHz.
Thus, the current loop compensation zero is:
F_Z=
---------------⁽---⁶---²----^K----^H-----^z----⁾---^⁄---⁶----------------
tan _⎝⎛
atan
⎛
⎝
26_{--⎠⎞}
+
60 d e g_⎠⎞
=
2.12 k H z
(EQ. 50)
The total compensation capacitance is calculated:
C_ip + C_ic=
⎛
⎜
⎜
⎝
⎛
⎜
⎝
------------^V----^O-----^U----^T-------------
L_BST ⋅ (2πf_c)²
⋅
A_{-----i-D----C---}
V_m
⋅
R^--R---_S^--C--_E^--S--_N^--_{⎠⎟⎞}
⋅
1^{-1----+-+----}((^---ff^--_cc^----⁄⁄^--ff^--_pz^---))---22-_{⎠⎟⎟⎞}
(EQ. 51)
C_ip + C_ic= (19.8)nF
C_ip
=
(C_i
p
+
C_i
C
)
-^f--^z-
f_p
The value of the noise filtering capacitor is:
C_ip
=
14.9 n
F
⋅
2_----._--1_---2_----k_---H_-----z_-
31 k H z
=
1.35 n F
(EQ. 52)
(EQ. 53)
(EQ. 54)
The value of C_ic is:
C_ic = 19.8nF – 1.35nF = 18.4nF
(EQ. 55)
The value of R_ic is:
R_ic = ₂----_π-----_â‹---₂---_.--₁---₂----_k----_H1-----_z----_â‹---₁---₈----_.-₄----_n----_F-- = 4.11kΩ
(EQ. 56)
Select the R_C value from the standard value, we have:
R_ic = 4.02kΩ, C_ic = 18nF, C_ip = 1.2nF. Figure 17 shows the actual
bode plot of current loop gain.
15
FN8258.1
August 8, 2013