SI52112-B5 Datasheet, PDF (15/20 Pages) Silicon Laboratories – PCI-EXPRESS GEN 3 DUAL OUTPUT CLOCK GENERATOR

Si52112-B5/B6
Table 9. TDFN Package Diagram Dimensions
Symbol
Min
Nom
Max
A
0.70
0.75
0.80
A1
0.00
0.02
0.05
A3
0.20 REF.
b
0.18
0.25
0.30
D
3.00 BSC.
D2
1.90
2.00
2.10
e
0.50 BSC
E
3.00 BSC
E2
1.40
1.50
1.60
L
0.25
0.30
0.35
aaa
0.10
bbb
0.10
ccc
0.10
ddd
0.10
eee
0.08
Notes:
1. All dimensions shown are in millimeters (mm) unless otherwise
noted.
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
3. Recommended card reflow profile is per the JEDEC/IPC J-STD-020
specification for Small Body Components.
4. This drawing conforms to the JEDEC Solid State Outline MO-229.
Rev 1.2
15