EFR32FG12 Datasheet, PDF (115/183 Pages) –

EFR32FG12 Flex Gecko Proprietary Protocol SoC Family Data Sheet
Pin Definitions
Pin Name
Pins Description
DECOUPLE
Decouple output for on-chip voltage regu-
A9 lator. An external decoupling capacitor is
required at this pin.
VREGVDD A11 Voltage regulator VDD input
VREGVSS
A13
B11 Voltage regulator VSS
B12
PF2
B2 GPIO (5V)
PC4
B4 GPIO (5V)
PJ14
B6 GPIO (5V)
PC8
B8 GPIO (5V)
IOVDD
B10
F2
F11
Digital IO power supply.
M12
PF11
C1 GPIO (5V)
PF9
C3 GPIO (5V)
PJ15
C6 GPIO (5V)
PB14
C11 GPIO
PB12
C13 GPIO
PF13
D2 GPIO (5V)
PB11
D11 GPIO
PB9
D13 GPIO (5V)
PK0
E2 GPIO
VSS
E5
E6
E7
E8
E9
F5
F6
F7
F8
F9
G5
G6
G7
G8 Ground
G9
H5
H6
H7
H8
H9
J5
J6
J7
J8
J9
K2
L2
Pin Name
DVDD
VREGSW
PF8
PF0
PC1
PC10
PC6
AVDD
PF10
PC2
PB15
PB13
PF14
PF12
PB10
PK1
PF15
PB8
Pins Description
A10 Digital power supply.
A12 DCDC regulator switching node
B1 GPIO (5V)
B3 GPIO (5V)
B5 GPIO (5V)
B7 GPIO (5V)
B9 GPIO (5V)
B13 Analog power supply.
C2 GPIO (5V)
C5 GPIO (5V)
C10 GPIO
C12 GPIO
D1 GPIO (5V)
D3 GPIO (5V)
D12 GPIO (5V)
E1 GPIO (5V)
E3 GPIO (5V)
E12 GPIO (5V)
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