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SI88X2X Datasheet, PDF (10/45 Pages) Silicon Laboratories – Isolation of up to 5000 Vrms
Si88x2x
Table 2. Electrical Characteristics1 (Continued)
VIN = 24 V; VDDA = VDDP = 3.0 to 5.5 V (see Figure 2) for all Si8822x/32x; VDDA = 4.3 V (see Figure 3) for all Si8842x/62x;
TA = –40 to 125 °C unless otherwise noted.
Parameter
Symbol
Test Condition
Min Typ Max Unit
100 Mbps, VDDB = 5 V ± 10% (All Inputs = 50 MHz Square Wave, CLOAD = 15 pF)
Si88x20
VDDA
VDDB
Si88x21
VDDA
VDDB
Si88x22
VDDA
VDDB
Timing Characteristics
mA
—
7.3
— 16.1
mA
—
9.7
—
7.3
mA
16.5
4.2
Data Rate
0
— 100 Mbps
Minimum Pulse Width
10
—
—
ns
Propagation Delay
tPHL
See Figure 1
VDDx = 3.3 V
17.8
ns
Propagation Delay
tPLH
See Figure 1
VDDx = 3.3 V
14.5
ns
Propagation Delay
tPHL
See Figure 1
VDDx = 5.0 V
17.5
ns
Propagation Delay
tPLH
See Figure 1
VDDx = 5.0 V
12.6
ns
Pulse Width Distor-
tion
|tPLH – tPHL|
Pulse Width Distor-
tion
|tPLH – tPHL|
Propagation Delay
Skew6
PWD
PWD
tPSK(P-P)
See Figure 1
VDDx = 3.3 V
See Figure 1
VDDx = 5.0 V
3.4
ns
4.8
ns
2.0
ns
Notes:
1. Over recommended operating conditions as noted in Table 1.
2. VOUT = VSNS x (1 + R1/R2) + R1 x Ioffset
3. VDDP current needed for dc-dc circuits.
4. VDDA current needed for dc-dc circuits.
5. The nominal output impedance of an isolator driver channel is approximately 50 , ±40%, which is a combination of
the value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
6. tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
7. Start-up time is the time period from when the UVLO threshold is exceeded to valid data at the output.
10
Rev. 0.5