SI596 Datasheet, PDF (1/12 Pages) Silicon Laboratories – Pb-free/RoHS-compliant

Si596
DUAL FREQUENCY VOLTAGE-CONTROLLED CRYSTAL
OSCILLATOR (VCXO) 10 TO 810 MHZ
Features
 Available with any-rate output  Available CMOS, LVPECL,
frequencies from 10 to 810 MHz
LVDS, and CML outputs
 Two selectable output frequencies  3.3, 2.5, and 1.8 V supply options
 3^rd generation DSPLL^® with
superior jitter performance
 Internal fixed fundamental mode
crystal frequency ensures high
 Industry-standard 5 x 7 mm
package and pinout
 Pb-free/RoHS-compliant
 –40 to +85 ºC operating range
reliability and low aging
Applications
 SONET/SDH (OC-3/12/48)  FTTx
 Networking
 Clock recovery and jitter cleanup PLLs
 SD/HD SDI/3G SDI video  FPGA/ASIC clock generation
Description
The Si596 dual-frequency VCXO utilizes Silicon Laboratories’ advanced
DSPLL^® circuitry to provide a low-jitter clock at high frequencies. The Si596
is available with any-rate output frequency from 10 to 810 MHz. Unlike
traditional VCXOs, where a different crystal is required for each output
frequency, the Si596 uses one fixed crystal to provide a wide range of output
frequencies. This IC-based approach allows the crystal resonator to provide
exceptional frequency stability and reliability. In addition, DSPLL clock
synthesis provides supply noise rejection, simplifying the task of generating
low-jitter clocks in noisy environments. The Si596 IC-based VCXO is
factory-configurable for a wide variety of user specifications including
frequency, supply voltage, output format, tuning slope, and absolute pull
range (APR). Specific configurations are factory programmed at time of
shipment, thereby eliminating the long lead times associated with custom
oscillators.
Functional Block Diagram
VDD
CLK– CLK+
Si5602
Ordering Information:
See page 7.
Pin Assignments:
See page 6.
(Top View)
VC 1
FS ²
GND 3
6
VDD
5 CLK–
4 CLK+
Fixed
Frequency
XO
Any-rate
10–810 MHz
DSPLL^®
Clock Synthesis
ADC
Vc
FS
GND
Rev. 1.0 6/16
Copyright © 2016 by Silicon Laboratories
Si596