SI102X Datasheet, PDF (1/538 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

Si102x/3x
Ultra Low Power 128K, LCD MCU Family
Ultra Low Power at 3.6V
- 110 µA/MHz IBAT; DC-DC enabled
- 110 nA sleep current with data retention; POR monitor enabled
- 400 nA sleep current with smaRTClock (internal LFO)
- 700 nA sleep current with smaRTClock (external XTAL)
- 2 µs wake-up from any sleep mode
12-Bit; 16 Ch. Analog-to-Digital Converter
- Up to 75 ksps 12-bit mode or 300 ksps 10-bit mode
- External pin or internal VREF (no external capacitor required)
- On-chip PGA allows measuring voltages up to twice the reference
voltage
- Autonomous burst mode with 16-bit automatic averaging accumu-
lator
- Integrated temperature sensor
Two Low Current Comparators
- Programmable hysteresis and response time
- Configurable as interrupt or reset source
Internal 6-Bit Current Reference
- Up to ±500 µA; source and sink capability
- Enhanced resolution via PWM interpolation
Integrated LCD Controller (Si102x Only)
- Supports up to 128 segments (32x4)
- Integrated charge pump for contrast control
Metering-Specific Peripherals
- DC-DC buck converter allows dynamic voltage scaling for 
maximum efficiency (250 mW output)
- Sleep-mode pulse accumulator with programmable switch 
de-bounce and pull-up control interfaces directly to metering sen-
sor
- Dedicated Packet Processing Engine (DPPE) includes hardware
AES, DMA, CRC, and encoding blocks for acceleration of wireless
protocols
- Manchester and 3 out of 6 encoder hardware for power efficient
implementation of the wireless M-bus specification
EZRadioPRO^® Transceiver
- Frequency range = 240–960 MHz
- Sensitivity = –121 dBm
- FSK, GFSK, and OOK modulation
- Max output power = +20 dBm or +13 dBm
- RF power consumption
18.5 mA receive
18 mA @ +1 dBm transmit
30 mA @ +13 dBm transmit
85 mA @ +20 dBm transmit
Data rate = 0.123 to 256 kbps
Auto-frequency calibration (AFC)
Antenna diversity and transmit/receive switch control
Programmable packet handler
TX and RX 64-byte FIFOs
Frequency hopping capability
On-chip crystal tuning
High-Speed 8051 µC Core
- Pipelined instruction architecture; executes 70% of instructions in 1
or 2 system clocks
Memory
- Up to 128 kB Flash; In-system programmable; Full read/write/erase
functionality over the entire supply range
- Up to 8 kB internal data RAM
Digital Peripherals
- 53 port I/O; All 5 V tolerant with high sink 
current and programmable drive strength
- Hardware SMBus™ (I2C™ compatible), 2 x SPI™, and UART
serial ports available concurrently
- Four general-purpose 16-bit counter/timers
- Programmable 16-bit counter/timer array with six capture/compare
modules and watchdog timer
Clock Sources
- Precision internal oscillators: 24.5 MHz with ±2% accuracy sup-
ports UART operation; spread-spectrum mode for reduced EMI
- Low power internal oscillator: 20 MHz
- External oscillator: Crystal, RC, C, CMOS clock
- smaRTClock oscillator: 32.768 kHz crystal or 16.4 kHz internal
LFO with three independent alarms
On-Chip Debug
- On-chip debug circuitry facilitates full-speed, non-intrusive, in-sys-
tem debug (no emulator required)
- Provides 4 breakpoints, single stepping
Packages
- –85 pin LGA (6 x 8 mm)
C2CK/RST
VBAT
VDC
VBATDC
IND
GNDDC
CAP
GND
Power On
Reset/PMU
Wake
Reset
Debug /
Programming
Hardware
CIP-51 8051
Controller Core
128/64/32/16 kByte
ISP Flash Program
Memory
256 Byte SRAM
8192/4096 Byte XRAM
C2D
VBAT
VDD
VREG
Analog
Power
Digital
Power
DMA
CRC
Engine
AES
Engine
Encoder
DC/DC Buck
Converter
LCD Charge
Pump
XTAL1
XTAL2
XTAL3
XTAL4
SYSCLK
Precision
24.5 MHz
Oscillator
Low Power
20 MHz
Oscillator
External
Oscillator
Circuit
Enhanced
smaRTClock
Oscillator
System Clock
Configuration
SFR
Bus
Port I/O Configuration
Digital Peripherals
UART
Timers
0/1/2/3
PCA/
WDT
Priority
Crossbar
Decoder
SMBus
SPI 0
Crossbar Control
LCD (4x32)
EMIF
Pulse Counter
EZRadioPro SPI 1
Analog Peripherals
Internal External
VREF VREF
12-bit
A
75ksps
ADC
M
U
X
VDD
VREF
Temp
Sensor
GND
CP0, CP0A +
-
CP1, CP1A +
-
Comparators
Port 0-1
Drivers
Port 2
Drivers
Port 3-6
Drivers
Port 7
Driver
16
P0.0...P1.7
4
P2.4...P2.7
32
P3.0...P6.7
P7.0/C2D
RF XCVR
(240-960 MHz,
+20/+13 dBm)
VCO
PA
AGC
LNA
Mixer
PGA
ADC
Digital
Modem
Delta
Sigma
Modulator
Digital
Logic
3
30 MHz
TX
RXp
RXn
SDN
nIRQ
GPIOx
XOUT
XIN
Rev. 0.3 11/11
Copyright © 2011 by Silicon Laboratories
Si102x/3x
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.