S-8261 Datasheet, PDF (7/36 Pages) Seiko Instruments Inc – BATTERY PROTECTION IC FOR SINGLE-CELL PACK

Rev.1.9_00
„ Pin Configurations
SOT-23-6
Top view
65 4
1 23
Figure 3
6-Pin SNB(B)
Top view
6 54
1 23
Bottom view
12 3
*1
BATTERY PROTECTION IC FOR SINGLE-CELL PACK
S-8261 Series
Pin No.
1
2
3
4
5
6
Symbol
DO
VM
CO
DP
VDD
VSS
Table 2
Pin description
FET gate control pin for discharge
(CMOS output)
Voltage detection pin between VM and VSS
(Overcurrent detection pin)
FET gate control pin for charge
(CMOS output)
Test pin for delay time measurement
Positive power input pin
Negative power input pin
Pin No.
1
2
3
4
5
6
Symbol
CO
VM
DO
VSS
DP
VDD
Table 3
Pin description
FET gate control pin for charge
(CMOS output)
Voltage detection pin between VM and VSS
(Overcurrent detection pin)
FET gate control pin for discharge
(CMOS output)
Negative power input pin
Test pin for delay time measurement
Positive power input pin
65 4
*1. Connect the heatsink of back
side at shadowed area to the
board, and set electric
potential open or VDD.
However, do not use it as
the function of electrode.
Figure 4
Seiko Instruments Inc.
7