S-93L46A Datasheet, PDF (23/48 Pages) Seiko Instruments Inc – LOW VOLTAGE OPERATION CMOS SERIAL E2PROM

Rev.3.1_00
2.2 Output pin
LOW VOLTAGE OPERATION CMOS SERIAL E²PROM
S-93L46A/56A/66A
Vcc
DO
Figure 27 DO Pin
3. Input pin noise elimination time
The S-93L46A/56A/66A include a built-in low-pass filter to eliminate noise at the SK, DI, and CS pins. This
means that if the supply voltage is 5.0 V (at room temperature), noise with a pulse width of 20 ns or less can
be eliminated.
Note, therefore, the noise with a pulse width of more than 20 ns will be recognized as a pulse if the voltage
exceeds V_IH/V_IL.
„ Precaution
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in
electrostatic protection circuit.
• SII claims no responsibility for any disputes arising out of or in connection with any infringement by
products including this IC of patents owned by a third party.
„ Precautions for WLP package
• The side of device silicon substrate is exposed to the marking side of device package. Since this portion
has lower strength against the mechanical stress than the standard plastic package, chip, crack, etc
should be careful of the handing of a package enough. Moreover, the exposed side of silicon has
electrical potential of device substrate, and needs to be kept out of contact with the external potential.
• In this package, the overcoat of the resin of translucence is carried out on the side of device area. Keep
it mind that it may affect the characteristic of a device when exposed a device in the bottom of a high
light source.
Seiko Instruments Inc.
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