S-817 Datasheet, PDF (15/50 Pages) Seiko Instruments Inc – SUPER-SMALL PACKAGE CMOS VOLTAGE REGULATOR

Rev.3.0_00
SUPER-SMALL PACKAGE CMOS VOLTAGE REGULATOR
S-817 Series
„ Selection of Output Capacitor (C_L)
To stabilize operation against variation in output load, a capacitor (C_L) must be mounted between VOUT
and VSS in the S-817 series because the phase is compensated with the help of the internal phase
compensation circuit and the ESR of the output capacitor.
When selecting a ceramic or an OS capacitor, capacitance should be 0.1 µF or more, and when selecting a
tantalum or an aluminum electrolytic capacitor, capacitance should be 0.1 µF or more and ESR 30 Ω or
less.
When an aluminum electrolytic capacitor is used attention should be especially paid to since the ESR of the
aluminum electrolytic capacitor increases at low temperature and possibility of oscillation becomes large.
Sufficient evaluation including temperature characteristics is indispensable. Overshoot and undershoot
characteristics differ depending upon the type of the output capacitor. Refer to C_L dependencies in “„
Reference Data 1. Transient Response Characteristics”.
„ Application Circuits
1. Output Current Boosting Circuit
Tr1
V_IN
R₁
C_IN
GND
S-817
VIN series
VSS
Figure 14
VOUT V_OUT
R₂
C_L
As shown in Figure 14, the output current can be boosted by externally attaching a PNP transistor. The
base current of the PNP transistor is controlled so that output voltage (V_OUT) goes the voltage specified
in the S-817 Series when base-emitter voltage (V_BE) necessary to turn on the PNP transistor is obtained
between input voltage (V_IN) and S-817 Series power source pin (VIN).
The following are tips and hints for selecting and ensuring optimum use of external parts
• PNP transistor (Tr1):
1. Set h_FE to approx. 100 to 400.
2. Confirm that no problem occurs due to power dissipation under normal operation conditions.
• Resistor (R₁):
Generally set R₁ to 1 kΩ ÷ V_{OUT (S)} (the voltage specified in the S-817 Series) or more.
• Output capacitor (C_L):
Output capacitor (C_L) is effective in minimizing output fluctuation at powering on or due to power
or load fluctuation, but oscillation might occur. Always connect resistor R2 in series to output
capacitor C_L.
• Resistor (R₂): Set R₂ to 2 Ω × V_OUT(S) or more.
• DO NOT attach a capacitor between the S-817 Series power source (V_IN) and GND pins or
between base and emitter of the PNP transistor to avoid oscillation.
• To improve transient response characteristics of the output current boosting circuit shown in
Figure 14, check that no problem occurs due to output fluctuation at powering on or due to
power or load fluctuation under normal operating conditions.
• Pay attention to the short current limit circuit incorporated into the S-817 Series because it does
not function as a shortcircuiting protection circuit for this boosting circuit.
Seiko Instruments Inc.
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