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S-11L10 Datasheet, PDF (15/35 Pages) Seiko Instruments Inc – SUPER-LOW OUTPUT LOW DROPOUT CMOS VOLTAGE REGULATOR
SUPER-LOW OUTPUT VOLTAGE LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.1.0_00
S-11L10 Series
3. ON / OFF pin
This pin starts and stops the regulator.
When the ON / OFF pin is set to the power-off level, the entire internal circuit stops operating, and the built-in P-
channel MOS FET output transistor between the VIN and VOUT pins is turned off, reducing current consumption
significantly.
Since the S-11L10 Series has a built-in discharge shunt circuit to discharge the output capacitance, the VOUT pin is
forcibly set to the VSS level. The ON / OFF pin is configured as shown in Figure 14 and 15.
(1) S-11L10 Series B type
The ON / OFF pin is internally pulled down to VSS by constant current source, so the VOUT pin is set to the VSS
level when it is in the floating state. For the ON / OFF pin current, refer to the B type of power-off pin input current
“H” in “„ Electrical Characteristics”.
(2) S-11L10 Series D type
Do not use the ON / OFF pin in the floating state because this pin is internally not pulled up or pulled down. When
not using the ON / OFF pin, connect it to the VIN pin.
Caution Under high temperature in the S-11L10 Series, this IC’s current consumption may increase if
applying voltage of 0.2 V to 0.9 V to the ON / OFF pin.
Logic Type
B/D
B/D
ON / OFF Pin
“L”: Power-off
“H”: Power-on
Table 8
Internal Circuits
Stop
Operate
VOUT Pin Voltage
VSS level
Set value
Current Consumption
ISS2
ISS1
(1) S-11L10 Series B Type
VIN
(2) S-11L10 Series D Type
VIN
ON / OFF
VSS
Figure 14
ON / OFF
VSS
Figure 15
Seiko Instruments Inc.
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