S-24CS64A Datasheet, PDF (12/44 Pages) Seiko Instruments Inc – 2-WIRE CMOS SERIAL E2PROM

2-WIRE CMOS SERIAL E²PROM
S-24CS64A
Rev.3.3_00
5. Device Addressing
To start communication, the master device on the system generates a start condition to the bus line. Next,
the master device sends 7-bit device address and a 1-bit read / write instruction code on to the SDA bus.
The 4 most significant bits of the device address are called the “Device Code”, and are fixed to “1010”.
Successive 3 bits are called the “Slave Address”. These 3 bits are used to identify a device on the system
bus and are compared with the predetermined value which is defined by the address input pins (A0, A1
and A2). When the comparison result matches, the slave device responds with an acknowledge during the
9th clock cycle.
Device Code
Slave Address
1
0
1
0
A2 A1 A0 R / W
MSB
LSB
Figure 11 Device Address
6. Write
6.1 Byte Write
When the master sends a 7-bit device address and a 1-bit read / write instruction code set to “0”, following
a start condition, the E²PROM acknowledges it. The E²PROM then receives the upper 8 bits of the word
address and responds with an acknowledge. And the E²PROM receives the lower 8 bits of the word
address and responds with an acknowledge. After the E²PROM receives 8-bit write data and responds
with an acknowledge, it receives a stop condition and that initiates the write cycle at the addressed
memory.
During the write cycle all operations are forbidden and no acknowledge is generated.
S
W
T
R
S
A
I
T
R
DEVICE
T
O
T
ADDRESS
E UPPER WORD ADDRESS LOWER WORD ADDRESS
DATA
P
SDA LINE
1 0 1 0 _{A2 A1 A0} 0
X X X W12W11W10W9 W8
W7 W6 W5 W4 W3 W2 W1 W0
D7 D6 D5 D4 D3 D2 D1 D0
M
LR A
S
S/ C
B
BW K
A
C
K
A_A
C_C
K_K
A
C
K
ADR INC
(ADDRESS INCREMENT)
Figure 12 Byte Write
12
Seiko Instruments Inc.