S-1133 Datasheet, PDF (11/37 Pages) Seiko Instruments Inc – HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR

HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.2.1_00
S-1133 Series
*1. V_OUT(S) : Extarnal setting reference voltage ( = 1.8 V)
*2. The output current at which the output voltage becomes 95% of V_VADJ after gradually increasing the output current.
*3. V_drop = V_IN1 − (V_OUT3 × 0.98)
V_OUT3 is the output voltage when V_IN = V_OUT(S) + 1.0 V and I_OUT = 100 mA.
V_IN1 is the input voltage at which the output voltage becomes 98% of V_OUT3 after gradually decreasing the input
voltage.
*4. The change in temperature [mV/°C] is calculated using the following equation.
[ ] [ ] [ ] ^∆VOUT mV/°C ^*1 = VOUT(S) V ^*2 × ^∆VOUT ppm/°C ^*3 ÷ 1000
∆Ta
∆Ta VOUT
*1. The change in temperature of the output voltage
*2. Extarnal setting reference voltage
*3. Output voltage temperature coefficient
*5. The output current can be at least this value. Due to restrictions on the package power dissipation, this value may not
be satisfied. Attention should be paid to the power dissipation of the package when the output current is large. This
specification is guaranteed by design.
Seiko Instruments Inc.
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