S-1132 Datasheet, PDF (11/35 Pages) Seiko Instruments Inc – HIGH RIPPLE-REJECTION LOW DROPOUT MIDDLE OUTPUT CURRENT CMOS VOLTAGE REGULATOR

HIGH RIPPLE-REJECTION LOW DROPOUT MIDDLE OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.3.2_00
S-1132 Series
„ Explanation of Terms
1. Low dropout voltage regulator
The low dropout voltage regulator is a voltage regulator whose dropout voltage is low due to its built-in low on-
resistance transistor.
2. Low ESR
A capacitor whose ESR (Equivalent Series Resistance) is low. The S-1132 Series enables use of a low ESR
capacitor, such as a ceramic capacitor, for the output-side capacitor C_L. A capacitor whose ESR is 2.0 Ω or less can
be used.
3. Output voltage (V_OUT)
The accuracy of the output voltage is ensured at ±1.0% under the specified conditions of fixed input voltage^*1, fixed
output current, and fixed temperature.
*1. Differs depending on the product.
Caution If the above conditions change, the output voltage value may vary and exceed the accuracy range
of the output voltage. Please see the electrical characteristics and attached characteristics data
for details.
4.
Line
regulation

∆V OUT1
∆VIN •VOUT

Indicates the dependency of the output voltage on the input voltage. That is, the values show how much the output
voltage changes due to a change in the input voltage with the output current remaining unchanged.
5. Load regulation (∆V_OUT2)
Indicates the dependency of the output voltage on the output current. That is, the values show how much the output
voltage changes due to a change in the output current with the input voltage remaining unchanged.
6. Dropout voltage (V_drop)
Indicates the difference between the input voltage V_IN1, which is the input voltage (V_IN) at the point where the output
voltage has fallen to 98% of the output voltage value V_OUT3 after V_IN was gradually decreased from V_IN = V_OUT(S) +
1.0 V, and the output voltage at that point (V_OUT3 × 0.98).
V_drop = V_IN1 − (V_OUT3 × 0.98)
Seiko Instruments Inc.
11