HYB314171BJ-50- Datasheet, PDF (8/24 Pages) Siemens Semiconductor Group – 3.3V 256 K x 16-Bit Dynamic RAM 3.3V Low Power 256 K x 16-Bit Dynamic RAM with Self Refresh

HYB 314171BJ/BJL-50/-60/-70
3.3V 256 K x 16-DRAM
Parameter
Output buffer turn-off delay from
CAS
Output buffer turn-off delay from
OE
Data to OE low delay
CAS high to datadelay
OE high to data delay
Symbol
Limit Values
Unit Note
-50
- 60
- 70
min. max. min. max. min. max.
t_OFF
0
15 0
20 0
20 ns 12
t_OEZ
0
15 0
20 0
20 ns 12
t_DZO
0
–
t_CDD
15 –
t_ODD
15 -
0–
20 –
20 –
0–
20 –
20 –
ns 13
ns 14
ns 14
Write Cycle
Write command hold time
t_WCH
Write command pulse width
t_WP
Write command setup time
t_WCS
Write command to RAS lead time t_RWL
Write command to CAS lead time t_CWL
Data setup time
t_DS
Data hold time
t_DH
Data to CAS lowdelay
t_DZC
10 –
10 –
0–
15 –
15 –
0–
10 –
0–
10 –
10 –
0–
15 –
15 –
0–
15 –
0–
15 –
15 –
0–
20 –
20 –
0–
15 –
0–
ns
ns
ns 15
ns
ns
ns 16
ns 16
ns 13
Read-modify-Write Cycle
Read-write cycle time
RAS to WE delay time
CAS to WE delay time
Column address to WE delay
time
OE command hold time
t_RWC
t_RWD
t_CWD
t_AWD
t_OEH
140 –
75 –
40 –
50 –
15 –
160 –
90 –
45 –
60 –
20 –
185 –
100 –
50 –
65 –
20 –
ns
ns 15
ns 15
ns 15
ns
Fast Page Mode Cycle
Fast page mode cycle time
t_PC
35 –
40 –
45 –
ns
CAS precharge time
t_CP
10 –
10 –
10 –
ns
Access time from CAS precharge t_CPA
–
30 –
35 –
40 ns 7
RAS pulse width
t_RASP 50 200k 60 200k 70 200k ns
RAS hold time from CAS
precharge
t_RHCP
30
–
35 –
40 –
ns
Semiconductor Group
8