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PEB2023 Datasheet, PDF (7/25 Pages) Siemens Semiconductor Group – ISDN DC Converter Circuit IDCC
PEB 2023
PEF 2023
Overview
1.3 Pin Definitions and Functions
Pin No.
Symbol Input (I)
Function
Output (O)
1
VREF
O
Output of the 4V reference voltage.
2
IP
I
When the voltage difference between IP and GND
exceeds 100mV, the digital current limiting
becomes active and turns off the external FET for
the rest of this oscillator period.
3
GND
I
All analog and digital signals are referred to this pin.
4
GA
O
Output of the FET-driver.
5
VEXT
I/O
Output of the internal supply. Via VEXT the internal
low-voltage-circuits can be supplied from an
external DC-supply in order to reduce chip power
dissipation. In supply voltage range 0 the positive
supply voltage must be connected via a resistor to
this pin.
6
CSS
I
The capacitor at this pin determines the soft-start
characteristic.
7
VS
I
VS is the positive input voltage for supply voltage
range 1, 2 and 3. Must be connected to GND via a
resistor when using supply voltage range 0.
8
COMP
O
Error amplifier output and Pulse Width Modulator
(PWM) input for loop stabilization network.
9
VP
I
10
VN
I
11
UV
I
Non-inverting input of the error amplifier.
Inverting input of the error amplifier.
Input undervoltage lockout. The input undervoltage
lockout level depends on the used supply voltage
range. Must be connected to pin VS when using
supply voltage range 0.
12
UVx
I
If this pin is connected to UV, then supply range 1 is
selected. If this pin is not connected (floating), then
supply range 2 or supply range 3 can be used. Must
be connected to pin VEXT when using supply voltage
range 0.
13
SYNC
I/O
Input for synchronization of the oscillator to an
external frequency, or output to synchronize
multiple devices.
14
RC
I
The external timing components of the ramp
generator are attached to this pin.
Semiconductor Group
7
08.97