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HYM322030S-GS50 Datasheet, PDF (6/10 Pages) Siemens Semiconductor Group – 2M x 32-Bit Dynamic RAM Module
HYM 322030S/GS-50/-60/-70
2M × 32-Bit
DC Characteristics1) (cont’d)
Parameter
Average VCC supply current
during fast page mode
(RAS = VIL, CAS, address cycling,
tPC = tPC min)
-50 version
-60 version
-70 version
Standby VCC supply current
(RAS = CAS = VCC – 0.2 V)
Average VCC supply current
during CAS-before-RAS refresh mode
(RAS, CAS cycling, tRC = tRC min)
-50 version
-60 version
-70 version
Symbol
ICC4
Limit Values
min.
max.
Unit Test
Condition
–
–
–
ICC5
–
ICC6
–
–
–
160
mA 2), 3), 4)
140
mA
120
mA
4
mA
480
mA 2), 4)
440
mA
400
mA
Capacitance
TA = 0 to 70 °C, VCC = 5 V ± 10 %, f = 1 MHz
Parameter
Input capacitance (A0 to A11)
Input capacitance (RAS0, RAS2)
Input capacitance (CAS0 - CAS3)
Input capacitance (WE)
I/O capacitance
(DQ0-DQ31)
Symbol
CI1
CI2
CI3
CI4
CIO
Limit Values
min.
max.
–
40
–
45
–
45
–
45
–
25
Unit
pF
pF
pF
pF
pF
Semiconductor Group
6