SAB80C517_05 Datasheet, PDF (42/323 Pages) Siemens Semiconductor Group – 8-Bit CMOS Single-Chip Microcontroller

On-Chip Peripheral Components
– The pullup FET p2 is of p-channel type. lt is always activated when a "1" is in the port latch,
thus providing the logic high output level. This pullup FET sources a much lower current than
p1; therefore the pin may also be tied to ground, e.g. when used as input with logic low input
level.
– The pullup FET p3 is of p-channel type. lt is only activated if the voltage at the port pin is
higher than approximately 1.0 to 1.5 V. This provides an additional pullup current if a logic high
level shall be output at the pin (and the voltage is not forced lower than approximately 1.0 to
1.5 V). However, this transistor is turned off if the pin is driven to a logic low level, e.g. when
used as input. In this configuration only the weak pullup FET p2 is active, which sources the
current I_IL. lf, in addition, the pullup FET p3 is activated, a higher current can be sourced (I_TL).
Thus, an additional power consumption can be avoided if port pins are used as inputs with a
low level applied. However, the driving cabability is stronger if a logic high level is output.
Figure 7-3
Output Driver Circiut of Ports 1 through 6
The described activating and deactivating of the four different transistors translates into four states
the pins can be:
– input low state (IL), p2 active only
– input high state (IH) = steady output high state (SOH), p2 and p3 active
– forced output high state (FOH), p1, p2 and p3 active
– output low state (OL), n1 active
Semiconductor Group
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