SDA525X-2 Datasheet, PDF (16/23 Pages) Siemens Semiconductor Group – ICs for Consumer Electronics

SDA 525X-2
Default after reset: 02_H
(MSB)
-
-
-
DAFR1
-
VS100 VD.2
SFR Address B1_H
(LSB)
VD.1
VD.0
Bit 7 … 4
VD
VS100
Must be set to 0
Vertical Delay: Reset value 0010, corresponds to 20
microsecond delay.
If VS100 = 0, delay can be set to 4, 12, 20, 28, 36, 44, 52,
60 µs
If VS100 = 1, delay can be set to 2, 6, 10, 14, 18, 22, 26, 30 µs
For VD bits selects the sampling mode
0 = 50 Hz
1 = 100 Hz
Following table gives an overview of the sampling point equivalents of the SDA 525x and
the SDA 525x-2 at a selected pixel frequency of 12 MHz.
Sample Point in µs Equivalent DHD-Setup
for SDA 525x (decimal)
4
not possible
12
207
20
111
28
15
36
not possible
44
not possible
52
not possible
60
not possible
Equivalent Register Setup for
SDA 525x-2 (binary)
000
001
010
011
100
101
110
111
Semiconductor Group
16
1998-10-08