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C515 Datasheet, PDF (11/55 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller
C515
Table 1
Pin Definitions and Functions (cont’d)
Symbol
EA
P0.0-P0.7
P5.ß-P5.7
P4.0-P4.7
PE
*) I = Input
O = Output
Pin Number
(P-MQFP-80)
49
52-59
67-60
72-74,
76-80
75
I/O*)
I
I/O
I/O
I/O
I
Function
External Access Enable
When held high, the C515 executes instructions from
the internal ROM (C515-1R) as long as the program
counter is less than 2000H. When held low, the C515
fetches all instructions from ext. program memory. For
the C515-L this pin must be tied low.
Port 0
is an 8-bit open-drain bidirectional I/O port. Port 0 pins
that have 1's written to them float, and in that state can
be used as high-impedance inputs. Port 0 is also the
multiplexed low-order address and data bus during
accesses to external program and data memory. In this
application it uses strong internal pullup resistors when
issuing 1's. Port 0 also outputs the code bytes during
program verification in the C515-1R. External pullup
resistors are required during program verification.
Port 5
is an 8-bit quasi-bidirectional I/O port with internal pullup
resistors. Port 5 pins that have 1's written to them are
pulled high by the internal pullup resistors, and in that
state can be used as inputs. As inputs, port 5 pins being
externally pulled low will source current (I IL, in the DC
characteristics) because of the internal pullup resistors.
Port 4
is an 8-bit quasi-bidirectional I/O port with internal pull-
up resistors. Port 4 pins that have 1’s written to them are
pulled high by the internal pull-up resistors, and in that
state can be used as inputs. As inputs, port 4 pins being
externally pulled low will source current (I IL, in the DC
characteristics) because of the internal pull-up resistors.
Power saving mode enable
A low level on this pin allows the software to enter the
power saving modes (idle mode and power down
mode). When PE is held at high level it is impossible to
enter the power saving modes. When left unconnected
this pin is pulled high by a weak internal pull-up resistor.
Semiconductor Group
11
1997-08-01