HYM362140S Datasheet, PDF (1/9 Pages) Siemens Semiconductor Group – 2M x 36-Bit Dynamic RAM Module

2M x 36-Bit Dynamic RAM Module
HYM 362140S/GS-60/-70
Advanced Information
• 2 097 152 words by 36-bit organization
(alternative 4 194 304 words by 18-bit)
• Fast access and cycle time
60 ns access time
110 ns cycle time (-60 version)
70 ns access time
130 ns cycle time (-70 version)
• Fast page mode capability with
40 ns cycle time (-60 version)
45 ns cycle time (-70 version)
• Single + 5 V (± 10 %) supply
• Low power dissipation
max. 6952 mW active (-60 version)
max. 6292 mW active (-70 version)
CMOS – 132 mW standby
TTL – 264 mW standby
• CAS-before-RAS refresh
RAS-only-refresh
Hidden-refresh
• 12 decoupling capacitors mounted on
substrate
• All inputs, outputs and clocks fully TTL
compatible
• 72 pin Single in-Line Memory Module with
31.75 mm height
• Utilizes eight 1M × 1-DRAMs and sixteen
1M × 4 DRAMs in 300 mil SOJ-packages
• 1024 refresh cycles / 16 ms
• Tin-Lead contact pads (S - version)
• God contact pads (GS - version)
Ordering Information
Type
HYM 362140S-60
Ordering Code
Q67100-Q955
Package
L-SIM-72-8
HYM 362140S-70
Q67100-Q954 L-SIM-72-8
HYM 362140GS-60
Q67100-Q957 L-SIM-72-8
HYM 362140GS-70
Q67100-Q956 L-SIM-72-8
Description
DRAM Module
(access time 60 ns)
DRAM Module
(access time 70 ns)
DRAM Module
(access time 60 ns)
DRAM Module
(access time 70 ns)
Semiconductor Group
601
05.94