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LQ043T1DG02 Datasheet, PDF (9/25 Pages) Sharp Electrionic Components – AVC Liquid Crystal Displays Group
【Note 1】
Sequences of supply voltage and signals
LCY-W-06901 Page 6 of 21
VCC
2.3V
0.3V
AVDD
CK
Hsync, Vsync
DATA
DISP
t1_C
4.8V
0.3V
t1_D
t2
Signal required domain
4.8V
t4
【Note 2】 t3
max.10frame
Min.10frame
2.3V
0.3V
t5
0.3V
LCD display
LED B/L
ON/OFF
Timing (example)
White mask
Display
Usual LCD
Display
White mask
Display
ON processing 9 frame OFF processing 9 frame
ON
OFF
◎ Please do not supply AVDD before VCC.
◎ It discharges and boost up voltage for TFT module on the basis of a DISP-signal
It drives Max-10 flames (about 0.2seconds) from change of DISP-signals by reasons that
It takes time for 9 flames while each processing operation.
Therefore, the display start is delayed for 10 flames and Ten or more frames needs to be
voltage maintained at the time of a display end.
◎ It is not problem to set up DISP=L ,AVDD=GND when VCC voltage is supplied
◎ Please don't set various signals to Hi-Z when VCC-voltage is supplied
in reason that those signals are CMOS input.
◎ Don't change DISP signal into the state of H level When AVDD voltage is in the state of GND.
◎ The ON/OFF timing of LED Back Light is an example.
t1_C
t1_D
t2
t3
t4
t5
MIN TYP MAX unit Remarks
0
-
10 ms
0.5 -
10 ms
50 -
-
ms
0.5 -
-
ms 【Note 2】
0
-
-
ms
0
-
-
ms
Dip Conditions for supply voltage
Vcc
td≦10ms
GND
td