LRS1382 Datasheet, PDF (82/114 Pages) Sharp Electrionic Components – STACKED CHIP 32M FLASH AND 8M SRAM

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Bus
Operation
Command
Comments
Write
Read Status Data=70H
Register Addr=Within Partition
Read
Status Register Data
Addr=Within Partition
Standby
Check SR.7
1=WSM Ready
0=WSM Busy
Standby
Check SR.2
1=Program Suspended
0=Program Completed
Bus
Operation
Command
Comments
Standby
Check SR.3
1=V_PP Error Detect
Standby
Check SR.1
1=Device Protect Detect
Block lock bit is set.
Standby
Check SR.4,5
Both 1=Command Sequence
Error
Standby
Check SR.4
1=Page Buffer Program Error
SR.5,SR.4,SR.3 and SR.1 are only cleared by the Clear
Status Register command in cases where multiple
locations are programmed before full status is checked.
If an error is detected, clear the Status Register before
attempting retry or other error recovery.
Figure 8.2. Automated Page Buffer Program Flowchart (Continued)
Appendix to Spec No.: MFM2-J13222 Model No.: LRS1382 March 1, 2001
Rev. 2.20