LRS1302 Datasheet, PDF (28/61 Pages) Sharp Electrionic Components – Stacked Chip 8M Flash and 1M SRAM

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LRS13023
26
Block/Devke Addraa
WriteOlHFtH.
Block/Device Add=
set
Bkck/Mrsta
Lack-Bit Setup
I
DZ?tP=6LJH
AddmBbxk AddrrsJ(BlaW,
Dcvia Address&laster)
Check if Desired
FULLSTATlJSCHECKPROCEUJRE
Set Luck-Bit Emw
&pent for subsquent lack-bit aetoperattom.
Pull ,btus check an be don after ench kxk-blt set operation
or after P aqucm of lock-bit set opemtlons.
Write ITH after the last lock-bit set opentlan IO pl.m de+ In
/ ^{read array made.}
ICheck SR3
ld’pp Error Detect
CheckSRl
I=oevh Protect Detect
b-V,,
(Set Master lack-Bit Onentton)
i%V,“, Master Lock-Bit is Set
(Set Block Lack-Bit Operation)
CIwck~45
Both l-Command
scquencs Emx
ICheck SR4
l&t Lack-Bit Error
SR55R4,SR3andSRlareoniyclearedbythe
aedtahra
command In cases where multiple lack-bib am set before-
If aror is detected, dear the Stahu Register befoe attempting
Figure 8. Set Block and Master Lock-Bit Flowchart