LH28F160SGED-L10 Datasheet, PDF (18/42 Pages) Sharp Electrionic Components – 16 M-bit (512 kB x 16 x 2-Bank) SmartVoltage Dual Work Flash Memory

LH28F160SGED-L10
Start
Write 20H,
Block Address
Write D0H,
Block Address
Read
Status Register
0
SR.7 =
1
BUS
OPERATION ^COMMAND
COMMENTS
Write
Erase Setup
Data = 20H
Addr = Within Block to be Erased
Write
Erase
Confirm
Data = D0H
Addr = Within Block to be Erased
Read
Status Register Data
Suspend Block
No
Erase Loop
Suspend
Block Erase _Yes
Standby
Check SR.7
1 = WSM Ready
0 = WSM Busy
Repeat for subsequent block erasures.
Full status check can be done after each block erase or after
a sequence of block erasures.
Write FFH after the last block erase operation to place device
in read array mode.
Full Status
Check if Desired
Block Erase
Complete
FULL STATUS CHECK PROCEDURE
Read Status Register
Data (See Above)
1
SR.3 =
0
VPP Range Error
SR.1 = ¹
0
Device Protect Error
1
SR.4, 5 =
0
Command Sequence
Error
SR.5 = ¹
0
Block Erase
Successful
Block Erase
Error
BUS
OPERATION ^COMMAND
COMMENTS
Standby
Check SR.3
1 = VPP Error Detect
Standby
Check SR.1
1 = Device Protect Detect
RP# = VIH, Block Lock-Bit is Set
Only required for systems
implementing lock-bit configuration
Standby
Check SR.4, 5
Both 1 = Command Sequence Error
Standby
Check SR.5
1 = Block Erase Error
SR.5, SR.4, SR.3 and SR.1 are only cleared by the Clear
Status Register command in cases where multiple blocks
are erased before full status is checked.
If error is detected, clear the status register before attempting
retry or other error recovery.
Fig. 3 Automated Block Erase Flowchart
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