GS2971 Datasheet, PDF (65/148 Pages) Semtech Corporation – 3Gb/s, HD, SD SDI Receiver, with Integrated Adaptive Cable Equalizer complete with SMPTE Audio and Video Processing

4. RESET_TRST = LOW
Table 4-13 shows the ERROR_STAT_X register and ERROR_MASK_X register.
NOTE: Since the error indication registers are cleared once per field, if an external host
micro is polling the error registers periodically, an error flag may be missed if it is
intermittent, and the polling frequency is less than the field rate.
Table 4-13: Error Status Register and Error Mask Register
Video Error Status Register
SAV_ERR (02h, 03h)
EAV_ERR (02h, 03h)
YCRC_ERR (02h, 03h)
CCRC_ERR (02h, 03h)
LNUM_ERR (02h, 03h)
YCS_ERR (02h, 03h)
CCS_ERR (02h, 03h)
AP_CRC_ERR (02h)
FF_CRC_ERR (02h)
VD_STD_ERR (02h, 03h)
Video Error Mask Register
SAV_ERR_MASK (037h, 038h)
EAV_ERR_MASK (037h, 038h)
YCRC_ERR_MASK (037h, 038h)
CCRC_ERR_MASK (037h, 038h)
LNUM_ERR_MASK (037h, 038h)
YCS_ERR_MASK (037h, 038h)
CCS_ERR_MASK (037h, 038h)
AP_CRC_ERR_MASK (037h)
FF_CRC_ERR_MASK (037h)
VD_STD_ERR_MASK (037h)
NOTE 1: See Section 4.19 for Audio Error Status.
NOTE 2: In 3G Level B mode, separate Video Error Mask registers exist for Link A and
Link B. The GS2971 distinguishes between Level A and Level B mappings at 3Gb/s.
When Level B data is detected, error detection is enabled separately for Data Stream 1
and Data Stream 2 (Link A and Link B, respectively). Therefore, a second set of error
status and mask registers is available for Data Stream 2, and is only valid when 3Gb/s
Level B data is detected by the device.
4.16.1 TRS Error Detection
TRS error flags are generated by the GS2971 under the following two conditions:
1. A phase shift in received TRS timing is observed on a non-switching line.
2. The received TRS Hamming codes are incorrect.
Both SAV and EAV TRS words are checked for timing and data integrity errors.
For HD mode, only the Y channel TRS codes are checked for errors.
For 3G mode Level A signals, only data stream one TRS codes are checked for errors. For
3G Level B signals, the Y channel TRS codes of both Link A and Link B are checked for
errors.
Both 8-bit and 10-bit TRS code words are checked for errors.
The SAV_ERR bit of the ERROR_STAT_X register is set HIGH when an SAV TRS error is
detected.
GS2971 3Gb/s, HD, SD SDI Receiver
Data Sheet
45898 - 2
September 2012
65 of 148