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GS6081 Datasheet, PDF (5/19 Pages) Semtech Corporation – Input signal trace equalizationnull
Table 1-1: Pin Descriptions (Continued)
Pin Number
Name
Type Description
Output Disable 1 (control signal input).
When set LOW, the first serial data output is disabled (powered-down) and the
SDO1/SDO1 pins are set to high-impedance. When set HIGH, the SDO1/SDO1 pins
6*
DISABLE1
Input will output a serial data signal.
See Section 4.4 for details.
This pin has an internal pull-up.
Output Disable 2 (control signal input).
When set LOW, the second serial data output is disabled (powered-down) and the
SDO2/SDO2 pins are set to high-impedance.
7*
DISABLE2
Input When set HIGH, the SDO2/SDO2 pins will output a serial data signal.
See Section 4.4 for details.
This pin has an internal pull-down.
9,10
SDO2, SDO2 Output Serial data differential output of second output buffer.
11,12
SDO1, SDO1 Output Serial data differential output of first output buffer.
Signal Presence (status signal output).
14
SP
Output Indicates presence of a signal at the pre-driver to the device’s output stage.
See Section 4.5 for details.
SD Slew Rate Enable (control signal input).
Sets the slew rate for SDO/SDO.
15
SD_EN
Input
See Section 4.3.1 for details.
This pin has an internal pull-up.
Equalizer Enable (control signal input).
See Section 4.2 for details.
16
EQ_EN
Input
This pin has an internal pull-up.
Note: this pin must be pulled HIGH or left floating for operation in SD mode.
—
Center Pad
Power
Connect to most negative power supply plane following the recommendations in
Recommended PCB Footprint on page 16.
*Note: When pins 6 and 7 are driven LOW together (or similarly when pin 6 is driven LOW while pin 7 is left floating), the entire device is
powered-down. In this state, minimum power consumption occurs.
GS6081
Final Data Sheet
PDS-060046
Rev.4
July 2014
www.semtech.com
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