GS6081 Datasheet, PDF (14/19 Pages) Semtech Corporation – Input signal trace equalizationnull

5. Application Information
5.1 PCB Layout
Special attention must be paid to component layout when designing serial digital
interfaces for HDTV.
An FR-4 dielectric can be used, however, controlled impedance transmission lines are
required for PCB traces longer than approximately 1cm. Note the following PCB artwork
features used to optimize performance:
• The PCB trace width for HD rate signals is closely matched to SMT component
width to minimize reflections due to changes in trace impedance
• The PCB ground plane is removed under the GS6081 output components to
minimize parasitic capacitance (Note: care should be taken, as removing too much
of the plane will make the system susceptible to EMI)
• The PCB ground plane is removed under the GS6081 RSET pin and resistor to
minimize parasitic capacitance. The R_SET resistor should be directly connected to
the VCC plane
• Input and output BNC connectors are surface mounted in-line to eliminate a
transmission line stub caused by a BNC mounting via high-speed traces
• High-speed traces are round-curved (rather than 45° or 90° angles) to minimize
impedance variations due to change of PCB trace width
5.2 Typical Application Circuit
V_CC
10nF
10nF
2.7nH**
V_CC
10nF
GND
4.7μF
GND
4.7μF
V_CC
R*
2 _DDI
3
DDI
5 _RSET
GS6081
75Ω
SDO1 ¹²
11
SDO1
SDO2 ₁₀
SDO2 ⁹
75Ω
4.7nH**
4.7μF
75Ω
75Ω
4.7nH**
75Ω 2.7nH**
V_CC
75Ω 2.7nH**
4.7nH**
4.7μF
10nF
GND
4.7μF
75Ω
75Ω
4.7nH**
4.7μF
GND
Notes:
* Selection based on desired output swing and PCB layout.
** Typical value: varies with layout, and represents a trade-off
between good eye shape and output return loss.
For backward compatibility with previous generation Cable Drivers;
2.7nH -> 0W
4.7nH -> 5.6nH
*** Please refer to section 4.2.
Figure 5-1: Typical Application Circuit
2.7nH** V_CC
10nF
GND
GS6081
Final Data Sheet
PDS-060046
Rev.4
July 2014
www.semtech.com
14 of 19
Proprietary & Confidential