LC7940YD Datasheet, PDF (6/11 Pages) Sanyo Semicon Device – Dot-matrix LCD Drivers

Pin No.
LC7940YD LC7941YD
96
85
95
86
Synbol
DI3
DI2
94
87
D11
93
88
M
85
96
P/S
82
99
CDO
1 to 80
80 to 1
Ol to O80
84
97
DISPOFF
81
91
NC
83
98
NC
90
100
NC
LC7940YD, LC7941YD
I/O
Functions
4–bit parallel data input pins.
Data input
SDI
LCD driver outputs
O4
O8
O80
I
DI3
O3
O7
O79
DI2
O2
O6
O78
DI1
O1
O5
O77
In serial data input mode, DI1 to DI3 should all be tied HIGH or LOW.
I
LCD panel drive voltage output alternation control signal.
I
Data input mode select. 4–bit parallel input when HIGH, and serial input when LOW
O
Cascade connection pin for extension segment drivers. Data is read out when HIGH.
Goes LOW after data is read out. Connected to the CDI input of the next chip.
LCD drive outputs.
The output drive level is determined by the display data, M signal and DISP OFF
input as shown below.
M
Q
DISP OFF
Output
LOW
LOW
HIGH
V₃
O
LOW
HIGH
HIGH
V₁
HIGH
LOW
HIGH
V₄
HIGH
HIGH
HIGH
V_EE
×
×
LOW
V₁
Note
x = don’t care (tied HIGH or LOW)
I
O1 to O80 output control input pin.
When LOW, V1 is output on the O1 to 080 outputs, See the truth table.
–
No connection.
No. 6158—6/11