LC8220 Datasheet, PDF (5/13 Pages) Sanyo Semicon Device – JPEG Still Color Image Compression/Decompression LSI

LC8220
Continued from preceding page.
Pin No.
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
Symbol
V_DD
V_SS
PXD7
PXD6
PXD5
PXD4
PXD3
PXD2
PXD1
PXD0
V_DD
V_SS
PXSIZE0
PXSIZE1
(NC)
CDCS
CDRD
CDWR
CDRDY
CDINT
CDRLS
CDEND
CDFLSH
(NC)
(NC)
(NC)
(NC)
(NC)
CPUCD
CDSIZE
V_DD
V_SS
CDD15
CDD14
CDD13
CDD12
CDD11
CDD10
CDD9
CDD8
V_DD
V_SS
CDD7
CDD6
CDD5
CDD4
CDD3
CDD2
CDD1
CDD0
V_DD
I/O
Function
— +5 V power supply
— Ground
I/O
I/O
I/O
I/O _{Pixel data bus}
I/O
I/O
I/O
I/O
— +5 V power supply
— Ground
I Bus width selection for the pixel bus
I (PXSIZE [1,0] = 00: 8 bits, 01: 16 bits, 1*: 32 bits)
—
I Code bus chip select^*2
I Code bus read request^*3
I Code bus write request^*4
O Code bus ready for read/write requests^*5
O Code bus interrupt request
I Code bus interrupt release
O Code bus last data output
I Code bus forcible buffer flush
—
—
—
—
—
I Connected CPU type setting for the code bus^*1
I Bus width setting for the code bus (0: 8 bits, 1: 16 bits)
— +5 V power supply
— Ground
I/O
I/O
I/O
I/O
Code data bus (D15 to D8 are unused if an 8-bit CPU is used.^*7)
I/O
I/O
I/O
I/O
— +5 V power supply
— Ground
I/O
I/O
I/O
I/O
Code data bus
I/O
I/O
I/O
I/O
— +5 V power supply
Note 1, 2, 3, 4, 5: These items are related to the CPU type.
6:
Connect to V_SS (ground).
7:
Must be pulled up.
8:
These are NC pins.
9:
Connect to V_DD.
Z**CS²
8086 family CPU (CPU = 1) CS
68000 family CPU (CPU = 0) AS
Z**RD³
RD
R/W
Z**WR⁴ Z**RDY⁵
WR
RDY
DS
ACK
No. 4909-5/13