LC8220 Datasheet, PDF (12/13 Pages) Sanyo Semicon Device – JPEG Still Color Image Compression/Decompression LSI

Control Bus Write Cycle
LC8220
Control Bus Register Write Cycle (type 1)
Control Bus Register Write Cycle (type 2)
Item
t1
Write signal assert setup time (referenced to CLK)
t2
Write signal assert hold time (referenced to CLK)
t3
Chip select stabilization time (referenced to the write signal)
t4
Chip select hold time (referenced to the write signal)
t5
Write cycle selection signal stabilization time (referenced to the write signal)
t6
Write cycle selection signal hold time (referenced to the write signal)
t7
Address stabilization time (referenced to the write signal)
t8
Address hold time (referenced to the write signal)
t9
Ready signal response delay time (referenced to the write signal)
t10
Ready signal release delay time (referenced to the write signal)
t11
Write signal negate setup time (referenced to CLK)
t12
Write signal negate hold time (referenced to CLK)
t13
Data setup time (referenced to the ready signal)
t14
Data hold time (referenced to the ready signal)
T
Clock period
Minimum
12
15
10
15
10
10
0
5
5
15
60
20
60
Maximum
Unit
ns
ns
ns
ns
ns
ns
ns
ns
T + t1 + 24
ns
t11 + 32
ns
ns
ns
ns
ns
ns
No. 4909-12/13