LC87F7LC8A Datasheet, PDF (4/25 Pages) Sanyo Semicon Device – CMOS IC FROM 128K byte, RAM 4096 byte on-chip 8-bit 1-chip Microcontroller

LC87F7LC8A
„Interrupts
• 28 sources, 10 vector addresses
1) Provides three levels (low (L), high (H), and highest (X)) of multiplex interrupt control. Any interrupt requests
of the level equal to or lower than the current interrupt are not accepted.
2) When interrupt requests to two or more vector addresses occur at the same time, the interrupt of the highest
level takes precedence over the other interrupts. For interrupts of the same level, the interrupt into the smallest
vector address takes precedence.
No. Vector Address
Level
Interrupt Source
1
00003H
X or L
INT0
2
0000BH
X or L
INT1
3
00013H
H or L
INT2/T0L/INT4/remote control receiver
4
0001BH
H or L
INT3/base timer/INT5
5
00023H
H or L
T0H/INT6
6
0002BH
H or L
T1L/T1H/INT7
7
00033H
H or L
SIO0/UART1 receive/T8L/T8H
8
0003BH
H or L
SIO1/UART1 transmit
9
00043H
H or L
ADC/MIC/T6/T7/PWM4,5
10
0004BH
H or L
Port 0/T4/T5
• Priority levels X > H > L
• Of interrupts of the same level, the one with the smallest vector address takes precedence.
• IFLG (List of interrupt source flag function)
1) Shows a list of interrupt source flags that caused a branching to a particular vector address (shown in the
diagram above).
„Subroutine Stack Levels
• 2048 levels (the stack is allocated in RAM)
„High-speed Multiplication/Division Instructions
• 16-bits × 8-bits
(5 tCYC execution time)
• 24-bits × 16-bits (12 tCYC execution time)
• 16-bits ÷ 8-bits
(8 tCYC execution time)
• 24-bits ÷ 16-bits (12 tCYC execution time)
„Oscillation Circuits
• RC oscillation circuit (internal): For system clock
• CF oscillation circuit:
For system clock, with internal Rf, external Rd
• Crystal oscillation circuit:
For low-speed system clock, with internal Rf, external Rd
• Frequency variable RC oscillation circuit (internal): For system clock
1) Adjustable in ±4% (typ.) step from a selected center frequency.
2) Measures oscillation clock using a input signal from XT1 as a reference.
„System Clock Divider Function
• Can run on low current.
• The minimum instruction cycle selectable from 300ns, 600ns, 1.2μs, 2.4μs, 4.8μs, 9.6μs, 19.2μs, 38.4μs, and
76.8μs (at a main clock rate of 10MHz).
No.A0835-4/25