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LC87F7LC8A Datasheet, PDF (20/25 Pages) Sanyo Semicon Device – CMOS IC FROM 128K byte, RAM 4096 byte on-chip 8-bit 1-chip Microcontroller
LC87F7LC8A
Continued from preceding page.
Parameter
HALT mode
consumption
current
(Note 7-1)
Symbol
Pin/
Remarks
Conditions
VDD[V]
min
IDDHALT(1)
IDDHALT(2)
VDD1
=VDD2
=VDD3
HALT mode
• FmCF=12MHz ceramic oscillation mode
• FmX’tal=32.768kHz crystal oscillation mode
• System clock set to 12MHz side
• Internal RC oscillation stopped.
• Frequency variable RC oscillation stopped.
4.5 to 5.5
3.0 to 3.6
• 1/1 frequency division ratio
IDDHALT(3)
HALT mode
• FmCF=8MHz ceramic oscillation mode
4.5 to 5.5
IDDHALT(4)
• FmX’tal=32.768kHz crystal oscillation mode
• System clock set to 8 MHz side
3.0 to 3.6
IDDHALT(5)
• Internal RC oscillation stopped.
• Frequency variable RC oscillation stopped.
• 1/1 frequency division ratio
2.5 to 3.0
IDDHALT(6)
HALT mode
• FmCF=4MHz ceramic oscillation mode
4.5 to 5.5
IDDHALT(7)
• FmX’tal=32.768kHz crystal oscillation mode
• System clock set to 4MHz side
3.0 to 3.6
IDDHALT(8)
• Internal RC oscillation stopped.
• Frequency variable RC oscillation stopped.
• 1/2 frequency division ratio
2.2 to 3.0
IDDHALT(9)
HALT mode
• FmCF=0Hz (oscillation stopped)
4.5 to 5.5
IDDHALT(10)
• FmX’tal=32.768kHz crystal oscillation mode
• System clock set to internal RC oscillation
3.0 to 3.6
IDDHALT(11)
• Frequency variable RC oscillation stopped.
• 1/2 frequency division ratio
2.2 to 3.0
Specification
typ
max unit
3.6
8.2
2
4.6
2.6
5.9
1.4
3.3
1
2.5
1.15 2.65
0.6
1.5
0.4
1.1
mA
0.37
1.3
0.2 0.75
0.13 0.54
IDDHALT(12)
IDDHALT(13)
IDDHALT(14)
IDDHALT(15)
IDDHALT(16)
IDDHALT(17)
IDDHALT(18)
IDDHALT(19)
HOLD mode
consumption
current
IDDHOLD(1)
IDDHOLD(2)
IDDHOLD(3)
VDD1
HALT mode
• FmCF=0Hz (oscillation stopped)
• FmX’tal=32.768kHz crystal oscillation mode
• Internal RC oscillation stopped.
• System clock set to 10MHz with frequency
variable RC oscillation
• 1/1 frequency division ratio
HALT mode
• FmCF=0Hz (oscillation stopped)
• FmX’tal=32.768kHz crystal oscillation mode
• Internal RC oscillation stopped.
• System clock set to 4MHz with frequency
variable RC oscillation
• 1/1 frequency division ratio
HALT mode
• FmCF=0Hz (oscillation stopped)
• FmX’tal=32.768kHz crystal oscillation mode
• System clock set to 32.768kHz side
• Internal RC oscillation stopped.
• Frequency variable RC oscillation stopped.
• 1/2 frequency division ratio
HOLD mode
• CF1=VDD or open
(External clock mode)
4.5 to 5.5
3.0 to 3.6
4.5 to 5.5
3.0 to 3.6
2.2 to 3.0
4.5 to 5.5
3.0 to 3.6
2.2 to 3.0
4.5 to 5.5
3.0 to 3.6
2.2 to 3.0
3.6
8.2
2
4.6
1.7
4
1
2.5
0.7
1.8
18.5
68
10
38
6.5
26
0.05
20 μA
0.03
12
0.02
8
Timer HOLD
mode
consumption
current
IDDHOLD(4)
IDDHOLD(5)
IDDHOLD(6)
VDD1
Timer HOLD mode
• CF1=VDD or open
(External clock mode)
• FmX’tal=32.768kHz crystal oscillation mode
4.5 to 5.5
3.0 to 3.6
2.2 to 3.0
16
58
8.5
32
5
20
Note 7-1: The consumption current value includes none of the currents that flow into the output Tr and internal pull-up
resistors.
No.A0835-20/25