LV4141W Datasheet, PDF (23/27 Pages) Sanyo Semicon Device – Bi-CMOS LSI For LCD Panel Drive Single Chip IC

(Note 4) BLHD phase set
(1Step = 2×1/fh)
LV4141W
BLHD
(Note 5) Sample hold phase
S/H pulse timing
CKH
A
B
C
D
E
F
Approx.7μs
Step 16
Step 15
00000
10000
(Default)
11111
B
S/H3
R
S/H2
G
S/H1
S/H4
S/H4
S/H4
SH3 SH2 SH1 SH4
CSH = H (Normal)
SHS1
SH1
B
SH2
F
SH3
D
SH4
C
SHS2
C
A
E
D
SHS3
D
B
F
E
SHS4
E
C
A
F
CSH = L (Inverted)
SHS1
SH1
D
SH2
F
SH3
B
SH4
C
SHS2
E
A
C
D
SHS3
F
B
D
E
SHS4
A
C
E
F
SH1 : SH pulse for G signal SH2 : SH pulse for R signal
SH3 : SH pulse for B signal SH4 : SH pulse for RGB signal
SHS5
F
D
B
A
SHS5
B
D
F
A
SHS6
A
E
C
B
SHS6
C
E
A
B
No.8927-23/27