LV4141W Datasheet, PDF (20/27 Pages) Sanyo Semicon Device – Bi-CMOS LSI For LCD Panel Drive Single Chip IC

LV4141W
(4-1) Various mode settings 2
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Description
V latch
0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 Normal mode
0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 1 For test. Do not set.
0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 VGATE function ON
0 0 0 0 0 0 1 1 0 0 0 0 0 0 1 0 VGATE function OFF
0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 Normal mode
0 0 0 0 0 0 1 1 0 0 0 0 0 1 0 0 For test. Do not set.
0 0 0 0 0 0 1 1 0 0 0 0 1 0 0 0 For test. Do not set.
0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 SIG center level changeover Low voltage
0 0 0 0 0 0 1 1 0 0 0 1 0 0 0 0 SIG center level changeover High voltage
0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 Normal mode
0 0 0 0 0 0 1 1 0 0 1 0 0 0 0 0 For test. Do not set.
0 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 For test. Do not set.
0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 For test. Do not set.
0 0 0 0 0 1 0 0 × × × HC5 HC4 HC3 HC2 HC1 H-position setting, 2fh×31Step (Note 1)
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0 0 0 0 0 1 0 1 × × × × × VP2 VP1 VP0 V-position setting, 1H×4Step (Note 2)
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0 0 0 0 0 1 1 0 × × × HD6 HD5 HD4 HD3 HD2 HD phase setting, 4fh×31Step (Note 3)
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0 0 0 0 0 1 1 1 × × × HW5 HW4 HW3 HW2 HW1 BLHD pulse setting, 2fh×31Step (Note 4)
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0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 Not used
0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 Normal mode
0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 1 For test. Do not set.
0 0 0 0 1 0 0 1 0 0 0 0 0 0 1 0 For test. Do not set.
0 0 0 0 1 0 0 1 0 0 0 0 0 1 0 0 For test. Do not set.
0 0 0 0 1 0 0 1 0 0 0 0 1 0 0 0 For test. Do not set.
0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 V blanking period CKH?STH stop OFF
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0 0 0 0 1 0 0 1 0 0 0 1 0 0 0 0 V blanking period CKH/STH stop ON
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0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 H blanking period CKH stop OFF
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0 0 0 0 1 0 0 1 0 0 1 0 0 0 0 0 H blanking period STH stop ON
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0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 Normal mode
0 0 0 0 1 0 0 1 0 1 0 0 0 0 0 0 For test. Do not set.
0 0 0 0 1 0 0 1 1 0 0 0 0 0 0 0 For test. Do not set.
0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 HD/VD output ON
0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 1 HD/VD output OFF (HD generation counter stop)
0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 BLHD output ON
0 0 0 0 1 0 1 0 0 0 0 0 0 0 1 0 BLHD output OFF (BLHD generation counter
stop)
0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 Backlight OFF (BLSW = 3V)
0 0 0 0 1 0 1 0 0 0 0 0 0 1 0 0 Backlight ON (BLSW = 0V)
0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 Normal mode
0 0 0 0 1 0 1 0 0 0 0 0 1 0 0 0 For test. Do not set.
0 0 0 0 1 0 1 0 0 0 0 1 0 0 0 0 For test. Do not set.
0 0 0 0 1 0 1 0 0 0 1 0 0 0 0 0 For test. Do not set.
0 0 0 0 1 0 1 0 0 1 0 0 0 0 0 0 For test. Do not set.
0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 Horizontal system counter operation
0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 0 Horizontal system counter stop
(effective at standby only)
0 0 0 0 1 0 1 1 0 0 0 0 0 0 0 0 Not used
0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 Not used
0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 0 Not used
0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 Not used
0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 Not used
Default
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10000
010
00000
10000
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No.8927-20/27