LC87F2J32A Datasheet, PDF (22/30 Pages) Sanyo Semicon Device – 8-bit 1-chip Microcontroller

LC87F2J32A
Continued from preceding page.
Parameter
Normal mode
consumption
current
(Note 9-1)
Symbol
IDDOP(10)
Pin/
Remarks
VDD1
Conditions
• FsX’tal=32.768kHz crystal oscillation mode
• System clock set to 32.768kHz side
• Internal Low speed and Medium speed RC
oscillation stopped.
VDD[V]
min
1.8 to 5.5
Specification
typ
max unit
27
120
(Note 9-2)
IDDOP(11)
• Frequency variable RC oscillation stopped.
• 1/2 frequency division ratio
• FsX’tal=32.768kHz crystal oscillation mode
• System clock set to 32.768kHz side
• Internal Low speed and Medium speed RC
oscillation stopped.
• Frequency variable RC oscillation stopped.
• 1/2 frequency division ratio
• Ta=-10 to +50°C
1.8 to 3.6
5.0
3.3
2.5
13
59
μA
27
84
13
33
8.1
22
HALT mode
consumption
current
IDDHALT(1)
VDD1
• HALT mode
• FmCF=12MHz ceramic oscillation mode
• System clock set to 12MHz side
2.7 to 5.5
2.6
4.7
(Note 9-1)
(Note 9-2)
• Internal Low speed and Medium speed RC
oscillation stopped.
• Frequency variable RC oscillation stopped.
2.7 to 3.6
1.4
2.5
• 1/1 frequency division ratio
IDDHALT(2)
• HALT mode
• CF1=24MHz external clock
• System clock set to CF1 side
• Internal Low speed and Medium speed RC
3.0 to 5.5
4.0
6.9
oscillation stopped.
• Frequency variable RC oscillation stopped.
• 1/2 frequency division ratio
3.0 to 3.6
2.0
3.4
IDDHALT(3)
• HALT mode
• FmCF=10MHz ceramic oscillation mode
• System clock set to 10MHz side
• Internal Low speed and Medium speed RC
2.2 to 5.5
2.2
4.4
oscillation stopped.
• Frequency variable RC oscillation stopped.
• 1/1 frequency division ratio
2.2 to 3.6
1.2
2.3
IDDHALT(4)
• HALT mode
• FmCF=4MHz ceramic oscillation mode
• System clock set to 4MHz side
• Internal Low speed and Medium speed RC
oscillation stopped.
• Frequency variable RC oscillation stopped.
• 1/1 frequency division ratio
1.8 to 5.5
1.8 to 3.6
mA
1.2
3.0
0.6
1.4
IDDHALT(5)
• HALT mode
• CF oscillation low amplifier size selected.
(CFLAMP=1)
2.2 to 5.5
0.6
1.5
• FmCF=4MHz ceramic oscillation mode
• System clock set to 4 MHz side
• Internal Low speed and Medium speed RC
oscillation stopped.
• Frequency variable RC oscillation stopped.
• 1/4 frequency division ratio
2.2 to 3.6
0.3
0.7
IDDHALT(6)
• HALT mode
• FsX’tal=32.768 kHz crystal oscillation mode
• Internal Low speed RC oscillation stopped.
• System clock set to internal Medium speed RC
1.8 to 5.5
0.3
0.9
oscillation
• Frequency variable RC oscillation stopped.
1.8 to 3.6
0.2
0.5
• 1/2 frequency division ratio
Note 9-1: The consumption current value includes none of the currents that flow into the output Tr and internal pull-up
resistors.
Note9-2: The consumption current values do not include operational current of LVD function if not specified
Continued on next page.
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