English
Language : 

LC75890W Datasheet, PDF (18/32 Pages) Sanyo Semicon Device – 1/4duty and Static Drive General-Purpose LCD Display Drivers
LC75890W, LC75890E
(4) DT … 1/4-duty 1/3-bias drive or static drive switching control data
This control data bit selects either 1/4-duty 1/3-bias drive or static drive.
Common output pins states
DT
Drive scheme
COM2
COM3
COM4
0
1/4 duty 1/3 bias drive
COM2
COM3
COM4
1
Static drive
Note: COM2, COM3, COM4 : Common output
“L” (VSS) : ”L” (VSS) level output
“L” (VSS)
“L” (VSS)
“L” (VSS)
(5) EXF … External clock operating frequency setting control data
This control data bit sets the operating frequency of the external clock which input into the OSCI pin, when the
external clock operating mode (OC="1") is set. However, this control data is effective only when external clock
operating mode (OC= "1") is set.
EXF
External clock operating frequency fCK[kHz]
0
fCK1=300[kHz]typ
1
fCK2=38[kHz]typ
(6) OC … Internal oscillator operating mode/external clock operating mode switching control data
This control data bit selects either the internal oscillator operating mode or external clock operating mode.
OC
Fundamental clock operating mode
I/O pin (S37/OSCI) state
0
Internal oscillator operating mode
S37
1
External clock operating mode
OSCI
Note: S37: Segment output
OSCI: External clock input
(7) SC … Segment on/off control data
This control data bit controls the on/off state of the segments.
SC
Display state
0
On
1
Off
Note that when the segments are turned off by setting SC to 1, the segments are turned off by outputting segment off
waveforms from the segment output pins.
(8) BU … Normal mode/power-saving mode control data
This control data bit selects either normal mode or power-saving mode.
BU
Mode
0
Normal mode
Power saving mode
In this mode, the internal oscillator circuit stops oscillation (the S37/OSCI pin is configured for segment
output) if the IC is in the internal oscillator operating mode (OC=0) and the IC stops receiving external clock
signals (the S37/OSCI pin is configured for external clock input) if the IC is in the external clock operating
1
mode (OC=1). In addition, the common and segment output pins go to the VSS level and the operation of
LCD drive bias voltage stabilization circuit stops.
However, the S1/P1 to S12/P12 output pins can be used as general-purpose output ports under the control
of the data bits P0 to P3. (The general-purpose output port P1 to P12 can not be used as PWM output).
No.A1971-18/32