LA9250M Datasheet, PDF (13/17 Pages) Sanyo Semicon Device – CD Player Analog Signal Processor (ASP)

LA9250M
This adjustment operation must be performed over the disc pit area, not over the disc mirror area. Note that
applications must take measures to assure that a stable TE signal is acquired so that track kick operations do not occur
during the adjustment. (This includes sled feed commands from the microcontroller.)
The E/F balance adjustment precision and adjustment range can be set to be optimal for the pickup characteristics by
the value of the resistor between TBC (pin 54) and the reference voltage, VR.
6. Sled Servo
The response characteristics are set at SLEQ (pin 27). The amplifier that follows SLEQ has a muting function, and
the sled servo can be turned off by setting SLOF (pin 33) high.
Sled feed is performed in a current input form at SL^– (pin 29) and SL⁺ (pin 30). In particular, a resistor is connected
to a microcontroller output port and the feed gain is set by the value of that resistor.
7. Spindle Servo
A servo circuit that holds the disc at a constant linear velocity is formed by the internal servo circuit in conjunction
with the DSP. A signal from the DSP is accepted by CLV (pin 45), and output from SPD (pin 26). The phase
compensation characteristics are set by SP (pin 23), SP^– (pin 25), and SPD. The 12 cm mode amplifier gain is set by a
resistor connected between SPG (pin 24) and the reference voltage. In 8 cm mode, this amplifier is internally buffered
and not affected by SPG. The circuit switches to 8 cm mode when SP8 (pin 35) is set high.
8. TES and HFL (Traversal signal)
The sub-beam signals from the pickup are connected to E (pin 3) and F (pin 4) so that HFL and TES have the phase
relationship shown in the figure when the pickup moves from the outside towards the inside of the disc. The TES
comparator has a hysteresis of about ±100 mV at the minus polarity of the comparator with respect to the TESI (pin
8) input. An external bandpass filter is formed so that only the required signal is extracted from the TE signal.
RFSM
2.0 V
1.4 V
1.0 V
HFL
TES
TE
A11267
9. DRF (Optical level decision)
A peak hold operation is applied to the EFM signal (RF output) by a capacitor at PH1 (pin 60), and DRF goes high
when the RF peak value exceeds about 1.3 V (when V_CC = 3.0 V). The PH1 capacitor is related to the settings of both
the DRF detection time constant and the RF AGC response.
DRF
RFSM
FE
Pickup position
Focus
2.0 V
1.3 V
1.0 V
A11268
No. 5981-13/17