LA9250M Datasheet, PDF (12/17 Pages) Sanyo Semicon Device – CD Player Analog Signal Processor (ASP)

LA9250M
Operation
1. APC (Auto Laser Power Control)
This circuit controls the laser power, turning the laser on and off (pin 38). The laser is turned on when the LASER pin
is high.
2. RF amplifier (eye pattern output)
The pickup photodiode output current input to FIN1 (pin 2) and FIN2 (pin 1) is I/V converted, passed through an
AGC circuit, and output from the RFSUM amplifier RF pin (pin 47). The built-in AGC circuit has a variable range of
about ±4 dB, and its time constant is set by the external capacitor connected to PH1 (pin 60). The EFM signal bottom
level is also controlled, and the response is set by the external capacitor attached to PH1 (pin 60). The center gain for
the AGC variable range is set by the value of the resistor between RF (pin 47) and RF- (pin 48). If required, these
pins can also be used for EFM signal 3T compensation.
3. SLC (Slice Level Controller)
Since the SLC circuit sets the duty of the EFM signal input to the DSP to 50%, the DC level is controlled by
integrating the EFMO signal from the DSP.
4. Focus Servo
The focus error signal is acquired by detecting the difference between (A + C) and (B + D) from the pickup and the
result is output from FE (pin 21). The FE signal gain is set by the value of the resistor between FE and FE^– (pin 22).
The FA amplifier is the pickup phase compensation amplifier, and its equalization curve is set by an external
capacitor and resistor.
The FD amplifier provides a phase compensation circuit and a focus search signal synthesis function.
A focus search operation is started by switching FSTA (pin 37) from low to high. A ramp waveform is generated by
an internal oscillator; this ramp completes in about 560 ms. We recommend holding FSTA (pin 37) high until another
focus search is to be performed. Focus is detected (the focus zero cross state) from the focus error signal generated, in
effect, by this waveform, and this turns the focus servo on. The ramp waveform amplitude is set by the value of the
resistor between FD (pin 17) and FE^– (pin 18).
Since FSC (pin 53) is used to smooth the focus search ramp waveform, a capacitor is connected between FSC and VR
(pin 58). FSS (pin 55) switches the focus search mode; when FSS is shorted to V_CC the circuit performs a + search
with respect to the reference voltage VR, and when open or shorted to ground, it performs a ± search.
5. Tracking Servo
The pickup photodiode output current input to E (pin 3) and F (pin 4) is I/V converted and passed first through a
balance adjustment VCA circuit and then through a VCA circuit that performs gain following for the RF AGC circuit.
The resulting signal is then output from TE (pin 7). The gain follower function can be turned off by setting TGRF
(pin 34) high.
The tracking error gain is set by the value of the resistor between TE^– (pin 6) and TE (pin 7).
The TH amplifier detects either the JP signal or the TGL signal from the DSP, and functions to change the response
characteristics of the servo according to the THLD signal generated internally. When a defect is detected, the circuit
switches to THLD mode internally. Set DEF (pin 51) low to prevent this. Note that an external bandpass filter that
extracts only the shock component from the tracking error signal is formed on SCI (pin 9), and that the gain is
automatically increased if this signal is inserted.
The TA output (pin 11) has an internal resistor so that a low-pass filter can be formed.
The TD amplifier circuit is provided to perform servo loop phase compensation, and its characteristics are set by
external RC components. This amplifier also provides a muting function, and the servo can be turned off by setting
TOFF (pin 42) high.
The TO amplifier provides a function for synthesizing JP pulses, and JP (pin 14) is used to set the JP pulse
conditions.
The E/F balance adjustment operation is started by switching EFBAL (pin 36) from low to high. After that, the
adjustment operation is performed by a clock generated by an internal oscillator, and the adjustment completes in
about 500 ms. We recommend holding EFBAL (pin 36) high until the next time an E/F balance operation is to be
performed.
No. 5981-12/17