LC87F7CC8A Datasheet, PDF (12/21 Pages) Sanyo Semicon Device – FROM 128K byte, RAM 4096 byte on-chip 8-bit 1-chip Microcontroller

LC87F7CC8A
Electrical Characteristics at Ta = -20°C to +70°C, VSS1 = VSS2 = VSS3 = 0V
Parameter
High level input
current
Symbol
IIH(1)
Pin/Remarks
• Ports 0, 1, 7, 8
• Ports A, B, D,
Conditions
• Output disabled
• Pull-up resister OFF.
VDD [V]
Specification
min
typ
max unit
E, L
• VIN=VDD
2.2 to 5.5
1
• PWM2, PWM3
(including OFF state leak current
of the output Tr.)
IIH(2)
RES
VIN=VDD
2.2 to 5.5
1
IIH(3)
XT1, XT2
When configured as an
2.2 to 5.5
1
input port. VIN=VDD
IIH(4)
CF1
VIN=VDD
2.2 to 5.5
15
Low level input
current
IIH(5)
IIL(1)
P87/AN7/MICIN
small signal input
• Ports 0, 1, 7, 8
• Ports A, B, D,
VIN=VBIS+0.5V
(VBIS: Bias voltage)
• Output disabled
• Pull-up resister OFF.
4.5 to 5.5
5
10
20
µA
E, L
• VIN=VSS
2.2 to 5.5
-1
• PWM2, PWM3
(including OFF state leak current
of the output Tr.)
IIL(2)
RES
VIN=VSS
2.2 to 5.5
-1
IIL(3)
XT1,XT2
When configured as an
input port. VIN=VSS
2.2 to 5.5
-1
IIL(4)
CF1
VIN=VSS
2.2 to 5.5
-15
IIL(5)
P87/AN7/MICIN
small signal input
VIN=VBIS-0.5V
(VBIS: Bias voltage)
4.5 to 5.5
-20
-10
-5
High level output
voltage
Low level output
voltage
LCD output voltage
regulation
LCD bias resistor
VOH(1)
VOH(2)
VOH(3)
VOH(4)
VOH(5)
VOH(6)
VOH(7)
VOH(8)
VOL(1)
VOL(2)
VOL(3)
VOL(4)
VOL(5)
VOL(6)
VOL(7)
VODLS
VODLC
RLCD(1)
RLCD(2)
Ports 0, 1: CMOS
output option
Port 7
• Ports A, B, D, E,
• PWM2, PWM3
Ports 0, 1
Ports 7, 8
• Ports A, B, D, E,
• PWM2, PWM3
S0 to S15,
S24 to S39
COM0 to COM3
Resistance per
one bias resistor
• Resistance per
one bias resistor
• 1/2R mode
IOH=-1.0mA
IOH=-0.4mA
IOH=-0.2mA
IOH=-0.4mA
IOH=-0.2mA
IOH=-1.0mA
IOH=-0.4mA
IOH=-0.2mA
IOL=10mA
IOL=1.6mA
IOL=1.0mA
IOL=1.6mA
IOL=1.0mA
IOL=1.6mA
IOL=1.0mA
IO=0mA
VLCD, 2/3VLCD, 1/3VLCD
level output
See Fig. 8.
IO=0mA
VLCD, 2/3VLCD, 1/2VLCD
1/3VLCD level output
See Fig. 8.
See Fig. 8.
See Fig. 8.
4.5 to 5.5
3.0 to 5.5
2.2 to 5.5
3.0 to 5.5
2.2 to 5.5
4.5 to 5.5
3.0 to 5.5
2.2 to 5.5
4.5 to 5.5
3.0 to 5.5
2.2 to 5.5
3.0 to 5.5
2.2 to 5.5
3.0 to 5.5
2.2 to 5.5
VDD-1
VDD-0.4
VDD-0.4
VDD-0.4
VDD-0.4
VDD-1
VDD-0.4
VDD-0.4
2.2 to 5.5
0
1.5
0.4
0.4
V
0.4
0.4
0.4
0.4
±0.2
2.2 to 5.5
2.2 to 5.5
2.2 to 5.5
0
±0.2
60
kΩ
30
Continued on next page.
No.A0147-12/21