K4S640832K Datasheet, PDF (9/14 Pages) Samsung semiconductor – 64Mb K-die SDRAM

K4S640832K
K4S641632K
Synchronous DRAM
DC CHARACTERISTICS (x16)
(Recommended operating condition unless otherwise noted, TA = 0 to 70°C for x16 only)
Parameter
Operating current
(One bank active)
Precharge standby current in
power-down mode
Precharge standby current in
non power-down mode
Active standby current in
power-down mode
Active standby current in
non power-down mode
(One bank active)
Operating current
(Burst mode)
Refresh current
Self refresh current
Symbol
Test Condition
ICC1
ICC2P
ICC2PS
ICC2N
ICC2NS
ICC3P
ICC3PS
ICC3N
ICC3NS
ICC4
ICC5
ICC6
Burst length = 1
tRC ≥ tRC(min)
IO = 0 mA
CKE ≤ VIL(max), tCC = 10ns
CKE & CLK ≤ VIL(max), tCC = ∞
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
CKE ≤ VIL(max), tCC = 10ns
CKE & CLK ≤ VIL(max), tCC = ∞
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
IO = 0 mA
Page burst
4Banks Activated
tCCD = 2CLKs
tRC ≥ tRC(min)
C
CKE ≤ 0.2V
L
Version
50
60
75
80 70 55
1
1
15
6
3
3
30
25
110 100 85
110 100 85
1
400
Notes : 1. Measured with outputs open.
2. Refresh period is 64ms.
3. K4S641632K-T(U)C
4. K4S641632K-T(U)L
5. Unless otherwise noted, input swing IeveI is CMOS(VIH /VIL=VDDQ/VSSQ)
Unit Note
mA
1
mA
mA
mA
mA
mA
1
mA
2
mA
3
uA
4
9 of 14
Rev. 1.1 February 2006