S6C0671 Datasheet, PDF (8/29 Pages) Samsung semiconductor – 8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER

S6C0671
8 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER
OPERATION DESCRIPTION
DISPLAY DATA TRANSFER
When DIO1 (or DIO2) pulse is loaded into internal latch on the rising edge of CLK2, DIO1 (or DIO2) pulse
enables the operation of data transfer, so display data is valid on the next rising edge of CLK2. Once all the
data of 384 channels are loaded into internal latch, it goes into stand-by state automatically, and any new data
is not accepted even though CLK2 is provided until next DIO1 (or DIO2) input. When next DIO1 (or DIO2) is
provided, new display data is valid on the 2nd rising edge of CLK2 after the rising edge of DIO1 (or DIO2).
EXTENSION OF OUTPUT
Output pin can be adjusted to an extended screen by cascade connection.
(1) SHL = "L"
Connect DIO1 pin of previous stage to the DIO2 pin of next stage and all the input pins
except DIO1 and DIO2 are connected together in each device.
(2) SHL = "H"
Connect DIO2 pin of previous stage to the DIO1 pin of next stage and all the input pins
except DIO2 and DIO1 are connected together in each device.
RELATIONSHIP BETWEEN INPUT DATA VALUE AND OUTPUT VOLTAGE
The LCD drive output voltages are determined by the input data and 18 (9 by 2) gamma corrected power supplies
(VGMA1 - VGMA18). Besides, to be able to deal with dot line inversion when mounted on a single-side, gradation
voltages with different polarity can be output to the odd number output pins and the even number output pins.
Among 9-by-2 gamma corrected voltages, input gray-scale voltages of the same polarity with respect to the
common voltage, for the respective 9 gamma corrected voltages of VGMA1 – VGMA9 and VGMA10 - VGMA18.
SHL = H
OUTPUT
Y1
-
DATA D00 - D07
-
Y6
First
-
D50 - D57
......
Y379
...... D00 - D07
-
Y384
Last
-
D50 - D57
SHL = L
OUTPUT
Y1
-
DATA D00 - D07
-
Y6
Last
-
D50 - D57
......
Y379
...... D00 - D07
-
Y384
First
-
D50 - D57
Figure 3. Relationship between Shift Direction and Output Data
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